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US5161304A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for packaging an electronic circuit device

Assignee: STMicroelectronics lnc USA
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Filing: 1991-08-01
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Granted: 1992-11-10
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Expires: 2011-08-01
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Abstract

Abstract An integrated circuit package encapsulates a volatile memory chip and a backup battery for preserving data in the event of loss of main power supply. The package includes a finger lead assembly encapsulated within a body of non-conductive material, with a central base support finger lead being offset within an interconnect region. One terminal of the battery is welded to the offset base finger lead, and the integrated circuit chip is bonded directly onto the other battery terminal by a layer of conductive epoxy. The stacked assembly of the integrated circuit chip, the battery and the offset base finger lead is centered longitudinally and vertically within the interconnect region whereby the stacked assembly, including gold interconnect wires, are completely encapsulated within the molded package body, without increasing the standoff height of the package.

Inventors

  • 👤 Daniel Queyssac
  • 👤 Richard K. Robinson
  • 👤 Kimi S. Husse

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 16:35
CPC Classifications
H; H10; H10W; H10W42/00; H10W70/00; H10W70/40; H10W70/411; H10W70/474; H05; H05K; H05K2203/00; H05K2203/30; H05K2203/304; H05K3/00; H05K3/30; H05K3/32; H05K3/34; H05K3/341; H05K3/3421; H10W72/00; H10W72/50; H10W72/541; H10W72/5449; H10W72/551; H10W72/552; H10W72/5522; H10W72/851; H10W72/874; H10W72/884; H10W74/00; H10W90/00; H10W90/701; H10W90/751; H10W90/756; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49121

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 106 words
A method for packaging an electronic circuit device and a battery for providing electrical power to said electronic circuit device comprising the steps: arranging the finger leads of a coplanar finger lead assembly in spaced relation about an interconnect region; supporting a power finger lead within said interconnect region in non-coplanar, offset relation to said finger lead assembly; mounting a power terminal of a battery onto said offset power finger lead; mounting said electronic circuit onto the other power terminal of said battery; and, encapsulating said stacked assembly of the electronic circuit device, battery, power lead and finger lead assembly within a body of non-conductive material.
Claim 2
Independent Claim 106 words
A method for packaging an electronic circuit device and a battery for providing electrical power to said electronic circuit device comprising the steps: arranging the finger leads of a coplanar finger lead assembly in spaced relation about an interconnect region; supporting a power finger lead within said interconnect region in non-coplanar, offset relation to said finger lead assembly; mounting a power terminal of a battery onto said offset power finger lead; mounting said electronic circuit onto the other power terminal of said battery; and, encapsulating said stacked assembly of the electronic circuit device, battery, power lead and finger lead assembly within a body of non-conductive material.

References Cited (Backward Citations)

US3863436A Cited
US4165607A Cited
US5055704A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-11-10 1996-05-11 1996-11-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-11-10 2000-05-11 2000-11-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-11-10 2004-05-11 2004-11-10 $7700.00 Window Closed / Lapsed

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