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Semiconductor integrated circuit device

Assignee: Renesas Electronics Corp
•
Filing: 1992-04-17
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Granted: 1994-02-22
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Expires: 2012-04-17
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Abstract

Abstract An intermediate voltage generating circuit for generating a voltage lying between an external power supply voltage and a ground voltage, and two voltage limiter circuits for generating internal power supply voltages and stabilized with this intermediate voltage as a reference are provided in a semiconductor integrated circuit. Even if the external power supply voltage or the ground voltage fluctuates, no disagreement is produced between a logical threshold of a circuit operating on the external power supply voltage and a logical threshold of a circuit operating on the internal power supply voltage.

Inventors

  • 👤 Masashi Horiguchi
  • 👤 Kiyoo Itoh
  • 👤 Yoshiki Kawajiri
  • 👤 Goro Kitsukawa
  • 👤 Takayuki Kawahara
  • 👤 Takesada Akiba

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 04:17
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/4063; G11C11/407; G11C5/00; G11C5/14; G11C5/147; G01; G01R; G01R31/00; G01R31/28; G01R31/317; G01R31/31712; G01R31/31715; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/24

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 117 words
A semiconductor integrated circuit device comprising: a first terminal to which a first external power supply voltage is applied; a second terminal to which with a second external power supply voltage is applied; first means for generating an intermediate voltage obtained by dividing said first and second external power supply voltages at a predetermined ratio; second means for generating a first internal power supply voltage between said first external power supply voltage and said intermediate voltage; and third means for generating a second internal power supply voltage between said second external power supply voltage and said intermediate voltage; wherein, both said first and second internal power supply voltages are stabilized with said intermediate voltage as a reference.
Claim 2
Dependent Claim 117 words
A semiconductor integrated circuit device comprising: a first terminal to which a first external power supply voltage is applied; a second terminal to which with a second external power supply voltage is applied; first means for generating an intermediate voltage obtained by dividing said first and second external power supply voltages at a predetermined ratio; second means for generating a first internal power supply voltage between said first external power supply voltage and said intermediate voltage; and third means for generating a second internal power supply voltage between said second external power supply voltage and said intermediate voltage; wherein, both said first and second internal power supply voltages are stabilized with said intermediate voltage as a reference.
Claim 3
Dependent Claim 63 words
A semiconductor integrated circuit device according to claim 1, wherein a logical threshold of a first circuit operating with said first and second external power supply voltages as power supplies and a logical threshold of a second circuit operating with said first and second internal power supply voltages as power supplies are set so as to be substantially equal to said intermediate voltage.
Claim 4
Dependent Claim 29 words
A semiconductor integrated circuit device according to claim 1, wherein said intermediate voltage is almost equal to a mean value of said first and second external power supply voltages.
Claim 5
Dependent Claim 29 words
A semiconductor integrated circuit device according to claim 2, wherein said intermediate voltage is almost equal to a mean value of said first and second external power supply voltages.

References Cited (Backward Citations)

US4916389A Cited
US4748340A Cited
US5046052A Cited
US5153452A Cited
JPH02246516A Cited
US5173875A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-02-21 1997-08-23 1998-02-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-02-21 2001-08-23 2002-02-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-02-21 2005-08-23 2006-02-22 $7700.00 Window Closed / Lapsed

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