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US5310690A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for forming integrated circuits having buried doped regions

Assignee: Texas Instruments Inc
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Filing: 1992-05-06
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Granted: 1994-05-10
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Expires: 2012-05-06
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Abstract

Abstract A method for fabricating an integrated circuit having a buried doped region is disclosed. A thermal oxide layer is formed over a portion of a p-type substrate at which an n+ buried doped region is not to be formed, masking the implant for the buried doped region. Anneal of the implant is performed in an oxidizing atmosphere, growing further oxide over the surface. The oxide layers are removed, and a p-type blanket implant is performed for isolation purposes and, if desired, to form a p-type buried doped region; the doping concentration of the n+ buried doped region retards diffusion of the boron to the surface thereover. Alternatively, a higher than normal doping level in the substrate can provide sufficient boron for isolation. An epitaxial layer is then grown over the surface, and the n-well is formed by implanting n-type dopant, with the p-well regions masked by a nitride mask; anneal of the n-well is also done in an oxidizing environment, so that consumption of a portion of the n-well by the oxide further planarizes the topography of the device.

Inventors

  • 👤 David A. Bell
  • 👤 Robert H. Havemann

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 14:26
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/0107; H10D84/0109; H10D84/02; H10D84/03; H10D84/038; H10W; H10W15/00; H10W15/01

Claims Analysis

Total Claims: 18
Claim 1
Independent Claim 106 words
A method for fabricating an integrated circuit at a surface of a semiconductor substrate of a first conductivity type, comprising: forming a first masking layer at a first location of said surface; doping a second location of said surface, said second location not covered by said first masking layer, with dopant of a second conductivity type; implanting both said first and second locations with dopant of said first conductivity type through said first masking layer; and forming a layer of semiconductor material over said first and second locations after said implanting step, so that said doped second location of said surface forms a buried doped region.
Claim 2
Independent Claim 106 words
A method for fabricating an integrated circuit at a surface of a semiconductor substrate of a first conductivity type, comprising: forming a first masking layer at a first location of said surface; doping a second location of said surface, said second location not covered by said first masking layer, with dopant of a second conductivity type; implanting both said first and second locations with dopant of said first conductivity type through said first masking layer; and forming a layer of semiconductor material over said first and second locations after said implanting step, so that said doped second location of said surface forms a buried doped region.
Claim 3
Dependent Claim 26 words
The method of claim 1, further comprising: removing said first masking layer after said implanting, and prior to said forming of said layer of semiconductor material.
Claim 4
Dependent Claim 57 words
The method of claim 1, wherein said step of doping said second location comprises: implanting dopant of said second conductivity type, said first masking layer masking said dopant of said second conductivity type from reaching said first location of said surface lying thereunder; and heating said semiconductor substrate to diffuse said dopant of said second conductivity type.
Claim 5
Dependent Claim 15 words
The method of claim 3, wherein said heating step is performed in an oxidizing atmosphere.
Claim 6
Dependent Claim 62 words
The method of claim 1, wherein said step of forming said first masking layer comprises: forming a mask over said second location of said surface but not said first location of said surface, said mask being a barrier to oxidation; and heating said semiconductor substrate in an oxidizing atmosphere to form said first masking layer at said first location of said surface.
Claim 7
Dependent Claim 93 words
The method of claim 1, further comprising: forming a second masking layer over said layer of semiconductor material at a location overlying said first location of said surface; and implanting said layer of semiconductor material with dopant of said second conductivity type at a location overlying said buried doped region, said second masking layer preventing said dopant from reaching the portion of said layer of semiconductor material lying thereunder; and heating said semiconductor substrate to diffuse said dopant in said layer of semiconductor material to form a well of said second conductivity type.
Claim 8
Dependent Claim 24 words
The method of claim 6, wherein said heating step is done in an oxidizing atmosphere to form a well oxide layer overlying said well.
Claim 9
Dependent Claim 75 words
The method of claim 7, further comprising: removing said second masking layer; implanting said layer of semiconductor material with dopant of said first conductivity type, said well oxide layer preventing said dopant of said first conductivity type from reaching said well of said second conductivity type; and heating said semiconductor substrate to diffuse said dopant of said first conductivity type in said layer of semiconductor material to form a well of said first conductivity type.
Claim 10
Dependent Claim 23 words
The method of claim 6, wherein said buried doped region is relatively more highly doped than said well of said second conductivity type.
Claim 11
Dependent Claim 25 words
The method of claim 1, wherein the doping concentration of said buried doped region is relatively higher than the doping concentration of said semiconductor substrate.
Claim 12
Dependent Claim 29 words
The method of claim 1, wherein the doping concentration of said first location after said implanting is approximately one order of magnitude greater than that of said semiconductor substrate.
Claim 13
Dependent Claim 18 words
The method of claim 1 wherein said step of forming a first masking layer is performed by oxidation.
Claim 14
Dependent Claim 20 words
The method of claim 1 wherein said step of doping a second location of said surface is performed by implantation.
Claim 15
Dependent Claim 17 words
The method of claim 1, wherein said first conductivity type is n-type and said dopant is antimony.
Claim 16
Dependent Claim 17 words
The method of claim 1, wherein said second conductivity type is n-type and said dopant is antimony.
Claim 17
Independent Claim 112 words
A method for fabricating an integrated circuit at a surface of a semiconductor substrate of a first conductivity type, comprising: forming a first masking layer at a first location of said surface; doping a second location of said surface, said second location not covered by said first masking layer, with dopant of a second conductivity type; implanting both said first and second locations with dopant of said first conductivity type; removing said first masking layer; and after removal of said first masking layer, forming an epitaxial layer over said first and second locations after said implanting step, so that said doped first and second locations of said surface form buried doped regions.
Claim 18
Independent Claim 112 words
A method for fabricating an integrated circuit at a surface of a semiconductor substrate of a first conductivity type, comprising: forming a first masking layer at a first location of said surface; doping a second location of said surface, said second location not covered by said first masking layer, with dopant of a second conductivity type; implanting both said first and second locations with dopant of said first conductivity type; removing said first masking layer; and after removal of said first masking layer, forming an epitaxial layer over said first and second locations after said implanting step, so that said doped first and second locations of said surface form buried doped regions.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-05-09 1997-11-08 1998-05-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-05-09 2001-11-08 2002-05-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-05-09 2005-11-08 2006-05-10 $7700.00 Window Closed / Lapsed

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