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US5336855A Expired / Lapsed US ⏱️ 0.0 years remaining

Multilayer printed circuit board, in particular, for high-frequency operation

Assignee: US Philips Corp
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Filing: 1992-01-06
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Granted: 1994-08-09
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Expires: 2012-01-06
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Abstract

Abstract The invention relates to a multilayer printed circuit board, in particular, for high-frequency operation, having least an outer, plane dielectric layer for accommodating interconnection paths of equal cross-section and component as well as further alternately provided metallic and dielectric layers for forming a reference earth and for the voltage supply to said interconnection paths and components via plated-through holes. In order to obtain a plane surface for the interconnection paths and predetermined areas on the printed circuit board, which areas have different characteristic impedances when interconnection paths having the same cross-section are used, at least the first metal layer comprises at least one window and the subsequent metal layer has a metal island corresponding to the area of the window, which island is connected to the reference earth via a buried plated-through hole, and the characteristic impedance of the interconnection paths is a function of the resulting thickness of the effective dielectric layers the number of which is increased in the area of the window.

Inventors

  • 👤 Joachim Kahlert
  • 👤 Klaus P. May
  • 👤 Joachim Noll

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 13:09
CPC Classifications
H; H05; H05K; H05K1/00; H05K1/02; H05K1/0213; H05K1/0237; H05K1/025; H05K1/0253; H05K1/0216; H05K1/0218; H05K1/0219; H05K2201/00; H05K2201/01; H05K2201/0183; H05K2201/0191; H05K2201/07; H05K2201/0707; H05K2201/0715; H05K2201/09; H05K2201/09209; H05K2201/0929; H05K2201/093; H05K2201/09309; H05K2201/09345; H05K2201/095; H05K2201/09618; H05K2201/09654; H05K2201/0969

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 119 words
A multilayer printed circuit board comprising: an uppermost dielectric layer for accommodating a plurality of interconnection paths and components, the interconnection paths having equal cross-section; a first metallic layer having a window; a further dielectric layer positioned below the first metallic layer; a second metallic layer positioned below the further dielectric layer for supplying a supply voltage to the interconnection paths and the components; a second dielectric layer positioned below the second metallic layer; a lower metallic layer positioned below the second dielectric layer having an island corresponding to an area of the window; and each of the interconnection paths having a predetermined impedance controlled by a thickness of the dielectric layers between the interconnection path and the island.
Claim 2
Dependent Claim 119 words
A multilayer printed circuit board comprising: an uppermost dielectric layer for accommodating a plurality of interconnection paths and components, the interconnection paths having equal cross-section; a first metallic layer having a window; a further dielectric layer positioned below the first metallic layer; a second metallic layer positioned below the further dielectric layer for supplying a supply voltage to the interconnection paths and the components; a second dielectric layer positioned below the second metallic layer; a lower metallic layer positioned below the second dielectric layer having an island corresponding to an area of the window; and each of the interconnection paths having a predetermined impedance controlled by a thickness of the dielectric layers between the interconnection path and the island.
Claim 3
Dependent Claim 14 words
The circuit board of claim 1, wherein the interconnection paths have a circular cross-section.
Claim 4
Dependent Claim 20 words
The circuit board of claim 2, wherein an area of the window and an area of the island are equal.
Claim 5
Dependent Claim 16 words
The circuit board of claim 3, wherein the island is insulated from the lower metallic layer.
Claim 6
Dependent Claim 39 words
The circuit board of claim 4, wherein the interconnection paths are insulated from the first metallic layer, the uppermost dielectric layer and the further dielectric layer and coupled to the further metallic layer by way of plated through holes.
Claim 7
Dependent Claim 26 words
The circuit board of claim 5, wherein the first metallic layer is coupled to the island at a contact area by way of plated through holes.
Claim 8
Dependent Claim 281 words
A multilayer printed circuit board comprising: an uppermost dielectric layer for accommodating a plurality of upper interconnection paths and upper components, the upper interconnection paths having equal cross-section; a lowermost dielectric layer for accommodating a plurality of lower interconnection paths and lower components, the lower interconnection paths having equal cross-section; a first upper metallic layer forming a reference earth; a further upper dielectric layer positioned below the first upper metallic layer; a first lower metallic layer forming a reference earth; a further lower dielectric layer positioned below the first lower metallic layer; a second upper metallic layer positioned below the further upper dielectric layer for supplying a supply voltage to the interconnection paths and the components, the second upper metallic layer including an upper window; a second lower metallic layer positioned above the further lower dielectric layer for supplying a supply voltage to the lower interconnection paths and the lower components, the second lower metallic layer including a lower window; a further upper dielectric layer positioned below the second upper metallic layer; a further upper metallic layer positioned below the further upper dielectric layer having an upper island corresponding to an area of the upper window, the upper island connected to the reference earth; a further lower dielectric layer positioned above the second lower metallic layer; a further lower metallic layer positioned above the further lower dielectric layer having a lower island corresponding to an area of the lower window, the lower island connected to the reference earth; and each of the upper and lower interconnection paths having a predetermined impedance controlled by a thickness of the dielectric layers between the interconnection path and one of the upper and lower island.
Claim 9
Dependent Claim 281 words
A multilayer printed circuit board comprising: an uppermost dielectric layer for accommodating a plurality of upper interconnection paths and upper components, the upper interconnection paths having equal cross-section; a lowermost dielectric layer for accommodating a plurality of lower interconnection paths and lower components, the lower interconnection paths having equal cross-section; a first upper metallic layer forming a reference earth; a further upper dielectric layer positioned below the first upper metallic layer; a first lower metallic layer forming a reference earth; a further lower dielectric layer positioned below the first lower metallic layer; a second upper metallic layer positioned below the further upper dielectric layer for supplying a supply voltage to the interconnection paths and the components, the second upper metallic layer including an upper window; a second lower metallic layer positioned above the further lower dielectric layer for supplying a supply voltage to the lower interconnection paths and the lower components, the second lower metallic layer including a lower window; a further upper dielectric layer positioned below the second upper metallic layer; a further upper metallic layer positioned below the further upper dielectric layer having an upper island corresponding to an area of the upper window, the upper island connected to the reference earth; a further lower dielectric layer positioned above the second lower metallic layer; a further lower metallic layer positioned above the further lower dielectric layer having a lower island corresponding to an area of the lower window, the lower island connected to the reference earth; and each of the upper and lower interconnection paths having a predetermined impedance controlled by a thickness of the dielectric layers between the interconnection path and one of the upper and lower island.
Claim 10
Dependent Claim 23 words
The circuit board of claim 1, wherein the uppermost dielectric layer, the further dielectric layer and the second dielectric layer have equal thickness.
Claim 11
Dependent Claim 24 words
The circuit board of claim 8, wherein the first metallic layer and, the further metallic layer and the lower metallic layer have equal thickness.
Claim 12
Dependent Claim 24 words
The circuit board of claim 1, wherein the first metallic layer and, the further metallic layer and the lower metallic layer have equal thickness.

References Cited (Backward Citations)

US4641425A Cited
US4811082A Cited
US4803595A Cited
US5012047A Cited
US5072075A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-08-08 1998-02-07 1998-08-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-08-08 2002-02-07 2002-08-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-08-08 2006-02-07 2006-08-09 $7700.00 Window Closed / Lapsed

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