Visual frame buffer architecture

Claim 1

An apparatus for integrating a graphics subsystem display buffer with a video subsystem display buffer comprising: (A) first storage means for storing a first bit plane of graphics data in a first format; (B) a graphics controller coupled to said first storage means by a data bus and a storage bus; (C) a second storage means for storing a second bit plane of video data in a second format different from said first format, said second storage means being coupled to said graphics controller by a data bus and a storage bus; (D) means employing chroma keying for forming a merged pixel stream from said graphics data stored on said first storage means and said video data stored on said second storage means, wherein said graphics data and said video data represent images stored at different spatial resolutions; (E) means for generating data transfer addresses of the same type for each of said storage means contemporaneously; and (F) means, coupled to said graphics controller, for generating an analog signal representative of said merged pixel stream.

Claim 2

An apparatus for integrating a graphics subsystem display buffer with a video subsystem display buffer comprising: (A) first storage means for storing a first bit plane of graphics data in a first format; (B) a graphics controller coupled to said first storage means by a data bus and a storage bus; (C) a second storage means for storing a second bit plane of video data in a second format different from said first format, said second storage means being coupled to said graphics controller by a data bus and a storage bus; (D) means employing chroma keying for forming a merged pixel stream from said graphics data stored on said first storage means and said video data stored on said second storage means, wherein said graphics data and said video data represent images stored at different spatial resolutions; (E) means for generating data transfer addresses of the same type for each of said storage means contemporaneously; and (F) means, coupled to said graphics controller, for generating an analog signal representative of said merged pixel stream.

Claim 3

An apparatus for integrating a graphics subsystem display buffer with a video subsystem display buffer comprising: (A) first storage means for storing a first bit plane of graphics data in a first format; (B) a graphics controller coupled to said first storage means by a data bus and a storage bus; (C) a second storage means for storing a second bit plane of video data in a second format different from said first format, said second storage means being coupled to said graphics controller by a data bus and a storage bus; (D) means employing chroma keying for forming a merged pixel stream from said graphics data stored on said first storage means and said video data stored on said second storage means, wherein said graphics data and said video data represent images stored at different spatial resolutions; (E) means for generating data transfer addresses of the same type for each of said storage means sequentially; and (F) means, coupled to said graphics controller, for generating an analog signal representative of said merged pixel stream.

Claim 4

An apparatus for integrating a graphics subsystem display buffer with a video subsystem display buffer comprising: (A) first storage means for storing a first bit plane of graphics data in a first format; (B) a graphics controller coupled to said first storage means by a data bus and a storage bus; (C) a second storage means for storing a second bit plane of video data in a second format different from said first format, said second storage means being coupled to said graphics controller by a data bus and a storage bus; (D) means employing chroma keying for forming a merged pixel stream from said graphics data stored on said first storage means and said video data stored on said second storage means, wherein said graphics data and said video data represent images stored at different spatial resolutions; (E) means for generating data transfer addresses of the same type for each of said storage means sequentially; and (F) means, coupled to said graphics controller, for generating an analog signal representative of said merged pixel stream.

Claim 5

An apparatus for integrating a graphics subsystem display buffer with a video subsystem display buffer comprising: (A) first storage means for storing a first bit plane of graphics data in a first format; (B) a graphics controller coupled to said first storage means by a data bus and a storage bus; (C) a second storage means for storing a second bit plane of video data in a second format different from said first format said second storage means being coupled to said graphics controller by a data bus and a storage bus; (D) means employing chroma keying for forming a merged pixel stream from said graphics data stored on said first storage means and said video data stored on said second storage means, wherein said graphics data and said video data represent images stored at different spatial resolutions; (E) means for generating data transfer addresses of the same type for each of said storage means in overlapping time relationship; and (F) means, coupled to said graphics controller, for generating an analog signal representative of said merged pixel stream.

Claim 6

An apparatus for integrating a graphics subsystem display buffer with a video subsystem display buffer comprising: (A) first storage means for storing a first bit plane of graphics data in a first format; (B) a graphics controller coupled to said first storage means by a data bus and a storage bus; (C) a second storage means for storing a second bit plane of video data in a second format different from said first format said second storage means being coupled to said graphics controller by a data bus and a storage bus; (D) means employing chroma keying for forming a merged pixel stream from said graphics data stored on said first storage means and said video data stored on said second storage means, wherein said graphics data and said video data represent images stored at different spatial resolutions; (E) means for generating data transfer addresses of the same type for each of said storage means in overlapping time relationship; and (F) means, coupled to said graphics controller, for generating an analog signal representative of said merged pixel stream.

Claim 7

An apparatus for integrating a graphics subsystem display buffer with a video subsystem display buffer comprising: (A) first storage means for storing a first bit plane of video data in a first format; (B) a graphics controller coupled to said first storage means by a data bus and a storage bus; (C) at least one additional storage means for storing at least one additional bit plane of graphics data in at least one additional format different form said first format, each of said at least one additional storage means being coupled to said graphics controller by a data bus and a storage bus; (D) means for forming a merged pixel stream from said video data stored on said first storage means and said graphics data stored on said at least one additional storage means, wherein said graphics data and said video data represent images stored at equivalent spatial resolutions; (E) means for generating data transfer addresses of different types for each of said storage means at substantially the same time; and (F) means, coupled to said graphics controller, for generating an analog signal representative of said merged pixel stream.

Claim 8

An apparatus for integrating a graphics subsystem display buffer with a video subsystem display buffer comprising: (A) first storage means for storing a first bit plane of video data in a first format; (B) a graphics controller coupled to said first storage means by a data bus and a storage bus; (C) at least one additional storage means for storing at least one additional bit plane of graphics data in at least one additional format different form said first format, each of said at least one additional storage means being coupled to said graphics controller by a data bus and a storage bus; (D) means for forming a merged pixel stream from said video data stored on said first storage means and said graphics data stored on said at least one additional storage means, wherein said graphics data and said video data represent images stored at equivalent spatial resolutions; (E) means for generating data transfer addresses of different types for each of said storage means at substantially the same time; and (F) means, coupled to said graphics controller, for generating an analog signal representative of said merged pixel stream.

Claim 9

An apparatus for integrating a graphics subsystem display buffer with a video subsystem display buffer comprising: (A) first storage means for storing a first bit plane of video data in a first format; (B) a graphics controller coupled to said first storage means by a data bus and a storage bus; (C) at least one additional storage means for storing at least one additional bit plane of graphics data in at least one additional format different from said first format, each of said at least one additional storage means being coupled to said graphics controller by a data bus and a storage bus; (D) means for forming a merged pixel stream from said video data stored on said first storage means and said graphics data stored on said at least one additional storage means, wherein said graphics data and said video data represent images stored at equivalent spatial resolutions; (E) means for generating data transfer addresses of different types for each of said storage means sequentially; and (F) means, coupled to said graphics controller, for generating an analog signal representative of said merged pixel stream.

Claim 10

An apparatus for integrating a graphics subsystem display buffer with a video subsystem display buffer comprising: (A) first storage means for storing a first bit plane of video data in a first format; (B) a graphics controller coupled to said first storage means by a data bus and a storage bus; (C) at least one additional storage means for storing at least one additional bit plane of graphics data in at least one additional format different from said first format, each of said at least one additional storage means being coupled to said graphics controller by a data bus and a storage bus; (D) means for forming a merged pixel stream from said video data stored on said first storage means and said graphics data stored on said at least one additional storage means, wherein said graphics data and said video data represent images stored at equivalent spatial resolutions; (E) means for generating data transfer addresses of different types for each of said storage means sequentially; and (F) means, coupled to said graphics controller, for generating an analog signal representative of said merged pixel stream.

Claim 11

An apparatus for integrating a graphics subsystem display buffer with a video subsystem display buffer comprising; (A) first storage means for storing a first bit plane of video data in a first format; (B) a graphics controller coupled to said first storage means by a data bus and a storage bus; (C) at least one additional storage means for storing at least one additional bit plane of graphics data in at least one additional format different from said first format, each of said at least one additional storage means being coupled to said graphics controller by a data bus and a storage bus; (D) means for forming a merged pixel stream from said video data stored on said first storage means and said graphics data stored on said at least one additional storage means, wherein said graphics data and said video data represent images stored at equivalent spatial resolutions; (E) means for generating data transfer addresses of different types for each of said storage means in overlapping time relationship; and (F) means, coupled to said graphics controller, for generating an analog signal representative of said merged pixel stream.

Claim 12

An apparatus for integrating a graphics subsystem display buffer with a video subsystem display buffer comprising; (A) first storage means for storing a first bit plane of video data in a first format; (B) a graphics controller coupled to said first storage means by a data bus and a storage bus; (C) at least one additional storage means for storing at least one additional bit plane of graphics data in at least one additional format different from said first format, each of said at least one additional storage means being coupled to said graphics controller by a data bus and a storage bus; (D) means for forming a merged pixel stream from said video data stored on said first storage means and said graphics data stored on said at least one additional storage means, wherein said graphics data and said video data represent images stored at equivalent spatial resolutions; (E) means for generating data transfer addresses of different types for each of said storage means in overlapping time relationship; and (F) means, coupled to said graphics controller, for generating an analog signal representative of said merged pixel stream.

Claim 13

An apparatus for integrating a graphics subsystem display buffer with a video subsystem display buffer comprising: (A) first storage means for storing a first bit plane of video data in a first format; (B) a graphics controller coupled to said first storage means by a data bus and a storage bus; (C) means for receiving at least one additional storage means for storing at least one additional bit plane of graphics data in at least one additional format different from said first format, each of said at least one additional storage means being coupled to said graphics controller by a data bus and a storage bus; (D) means for forming a merged pixel stream from said video data stored on said first storage means and said graphics data stored on said at least one additional storage means, wherein said graphics data and said video data represent images stored at equivalent spatial resolutions; (E) means for generating data transfer addresses of different types for each of said storage means contemporaneously; and (F) means, coupled to said graphics controller, for generating an analog signal representative of said merged pixel stream.

Claim 14

An apparatus for integrating a graphics subsystem display buffer with a video subsystem display buffer comprising: (A) first storage means for storing a first bit plane of video data in a first format; (B) a graphics controller coupled to said first storage means by a data bus and a storage bus; (C) means for receiving at least one additional storage means for storing at least one additional bit plane of graphics data in at least one additional format different from said first format, each of said at least one additional storage means being coupled to said graphics controller by a data bus and a storage bus; (D) means for forming a merged pixel stream from said video data stored on said first storage means and said graphics data stored on said at least one additional storage means, wherein said graphics data and said video data represent images stored at equivalent spatial resolutions; (E) means for generating data transfer addresses of different types for each of said storage means contemporaneously; and (F) means, coupled to said graphics controller, for generating an analog signal representative of said merged pixel stream.

Claim 15

An apparatus for integrating a graphics subsystem display buffer with a video subsystem display buffer comprising: (A) first storage means for storing a first bit plane of video data in a first format; (B) a graphics controller coupled to said first storage means by a data bus and a storage bus; (C) means for receiving at least one additional storage means for storing at least one additional bit plane of graphics data in at least one additional format different from said first format, each of said at least one additional storage means being coupled to said graphics controller by a data bus and a storage bus; (D) means for forming a merged pixel stream from said video data stored on said first storage means and said graphics data stored on said at least one additional storage means, wherein said graphics data and said video data represent images stored at equivalent spatial resolutions; (E) means for generating data transfer addresses of different types for each of said storage means sequentially; and (F) means, coupled to said graphics controller, for generating an analog signal representative of said merged pixel stream.

Claim 16

An apparatus for integrating a graphics subsystem display buffer with a video subsystem display buffer comprising: (A) first storage means for storing a first bit plane of video data in a first format; (B) a graphics controller coupled to said first storage means by a data bus and a storage bus; (C) means for receiving at least one additional storage means for storing at least one additional bit plane of graphics data in at least one additional format different from said first format, each of said at least one additional storage means being coupled to said graphics controller by a data bus and a storage bus; (D) means for forming a merged pixel stream from said video data stored on said first storage means and said graphics data stored on said at least one additional storage means, wherein said graphics data and said video data represent images stored at equivalent spatial resolutions; (E) means for generating data transfer addresses of different types for each of said storage means sequentially; and (F) means, coupled to said graphics controller, for generating an analog signal representative of said merged pixel stream.

Claim 17

An apparatus for integrating a graphics subsystem display buffer with a video subsystem display buffer comprising: (A) first storage means for storing a first bit plane of video data in a first format; (B) a graphics controller coupled to said first storage means by a data bus and a storage bus; (C) means for receiving at least one additional storage means for storing at least one additional bit plane of graphics data in at least one additional format different from said first format, each of said at least one additional storage means being coupled to said graphics controller by a data bus and a storage bus; (D) means for forming a merged pixel stream from said video data stored on said first storage means and said graphics data stored on said at least one additional storage means, wherein said graphics data and said video data represent images stored at equivalent spatial resolutions; (E) means for generating data transfer addresses of different types for each of said storage means in overlapping time relationship; and (F) means, coupled to said graphics controller, for generating an analog signal representative of said merged pixel stream.

Claim 18

An apparatus for integrating a graphics subsystem display buffer with a video subsystem display buffer comprising: (A) first storage means for storing a first bit plane of video data in a first format; (B) a graphics controller coupled to said first storage means by a data bus and a storage bus; (C) means for receiving at least one additional storage means for storing at least one additional bit plane of graphics data in at least one additional format different from said first format, each of said at least one additional storage means being coupled to said graphics controller by a data bus and a storage bus; (D) means for forming a merged pixel stream from said video data stored on said first storage means and said graphics data stored on said at least one additional storage means, wherein said graphics data and said video data represent images stored at equivalent spatial resolutions; (E) means for generating data transfer addresses of different types for each of said storage means in overlapping time relationship; and (F) means, coupled to said graphics controller, for generating an analog signal representative of said merged pixel stream.