Patent US5346833A successfully refreshed from Google Patents.
US5346833A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Simplified method of making active matrix liquid crystal display
Assignee: Industrial Technology Research Institute
•
Filing: 1993-04-05
•
Granted: 1994-09-13
•
Expires: 2013-04-05
Abstract
Abstract An inverted staggered (bottom gate) thin film transistor (TFT) for active matrix liquid crystal display is processed with three masks. The first mask is used to pattern a metal film on a glass substrate as the gate of the TFT, the scan line of the TFT array, and a portion of the data line of the TFT array. The second mask is used to form a TFT mesa with a gate dielectric layer, an a-Si layer as channel, and a heavily-doped n+s-Si layer for contacting the source and the drain of the TFT. A third mask is used to pattern the transparent conductive indium-tin oxide film as the pixel electrode, the source/drain electrodes of the TFT, and the interconnections of the data line.
Inventors
- 👤 Biing-Seng Wu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 08:58
CPC Classifications
H; H10; H10D; H10D86/00; H10D86/01; H10D86/021; H10D86/0231; G; G02; G02F; G02F1/00; G02F1/01; G02F1/13; G02F1/133; G02F1/136; G02F1/1362; G02F1/1368; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0312; H10D30/0316; H10D30/0321; H10D30/60; H10D30/67; H10D30/6729; H10D30/6737; H10D30/674; H10D30/6741; H10D30/6743; H10D86/40; H10D86/60
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
158 words
A three mask method of fabricating an inverted staggered thin film transistor of an inverted staggered structure for active matrix crystal display systems with a matrix of picture elements, each thin film transistor having a gate, a source, and a drain, comprising the steps of: depositing a metal film on a transparent substrate; patterning said metal film as said gate electrode of said thin film transistor, as scan lines, and as data lines using a first mask; successively depositing an insulating layer, an amorphous semiconductor layer, and a heavily doped amorphous semiconductor layer over said transparent substrate; simultaneously patterning said insulating layer, said amorphous semiconductor layer, and said heavily doped amorphous semiconductor layer using a second mask to form a mesa; depositing a transparent conducting layer over said mesa; and patterning said transparent conducting layer using a third mask to form electrodes of picture elements, and crossover connections of said data lines at cross-points with said scan lines.
Claim 2
Dependent Claim
158 words
A three mask method of fabricating an inverted staggered thin film transistor of an inverted staggered structure for active matrix crystal display systems with a matrix of picture elements, each thin film transistor having a gate, a source, and a drain, comprising the steps of: depositing a metal film on a transparent substrate; patterning said metal film as said gate electrode of said thin film transistor, as scan lines, and as data lines using a first mask; successively depositing an insulating layer, an amorphous semiconductor layer, and a heavily doped amorphous semiconductor layer over said transparent substrate; simultaneously patterning said insulating layer, said amorphous semiconductor layer, and said heavily doped amorphous semiconductor layer using a second mask to form a mesa; depositing a transparent conducting layer over said mesa; and patterning said transparent conducting layer using a third mask to form electrodes of picture elements, and crossover connections of said data lines at cross-points with said scan lines.
Claim 3
Dependent Claim
19 words
A three-mask method of making a thin film transistor as described in claim 1, wherein said substrate is glass.
Claim 4
Dependent Claim
27 words
A three-mask method of making a thin film transistor as described in claim 1, wherein said metal is selected from a group consisting of chromium and aluminum.
Claim 5
Dependent Claim
20 words
A three-mask method of making a thin film transistor as described in claim 1, wherein said insulating layer is silicon-nitride.
Claim 6
Dependent Claim
21 words
A three-mask method of making a thin film transistor as described in claim 1, wherein said amorphous semiconductor is amorphous silicon.
Claim 7
Dependent Claim
23 words
A three-mask method of making a thin film transistor as described in claim 1, wherein said heavily doped semiconductor is heavily doped silicon.
Claim 8
Dependent Claim
21 words
A three-mask method of making a thin film transistor as described in claim 1, wherein said transparent conductive layer is tin-indium-oxide.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-09-12 | 1998-03-14 | 1998-09-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-09-12 | 2002-03-14 | 2002-09-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-09-12 | 2006-03-14 | 2006-09-13 | $7700.00 | Window Closed / Lapsed |