← Back to Patent Explorer
US5357524A Expired / Lapsed US ⏱️ 0.0 years remaining

Apparatus for converting a digital signal

Assignee: Sony Corp
•
Filing: 1993-02-23
•
Granted: 1994-10-18
•
Expires: 2013-02-23
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A maximum likelihood decoder (28) comprises a Viterbi decoding unit (30) and a symbol concluding unit (29). Final N-M bit data of data of N (>M) bit unit, to which M-bit original data is converted, is supplied to the symbol concluding unit (29) as a terminal portion and other data is supplied to the Viterbi decoding unit (30), thereby being demodulated by a demodulator (37). A maximum likelihood decoding apparatus is provided in which image data or the like can be recorded and reproduced at high speed and maximum likelihood parallel decoding is effected. A reproducing data demodulating apparatus using such maximum likelihood decoding apparatus is also provided.

Inventors

  • 👤 Yoshihide Shimpuku
  • 👤 Hiroyuki Ino
  • 👤 Yasuyuki Chaki

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 04:25
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; G11B20/10009; G11B20/10046; G11B20/10055; G11B20/10268; G11B20/10287; G11B20/10296; G11B20/14; G11B20/1403; G11B20/1423; G11B20/1426; G11B20/18; G11B20/1806; G11B20/1813

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 124 words
A recording data modulating apparatus in which M-bit original data is converted into an N-bit recording code, where N is greater than M, said apparatus comprising: a modulation table in which there is stored an M-N modulation code in which a number of consecutive "0's" is less than 4 and in which a ratio between a maximum magnetic state transition time interval Tmax and a minimum magnetic state transition time interval Tmin of the stored M-N modulation code is less than 4; synchronizing pattern generating means for generating a synchronizing signal; and multiplexing means receiving said synchronizing signal and a modulation code signal read from said modulation table for multiplexing said synchronizing signal and said modulation code signal to form a recording data signal.
Claim 2
Dependent Claim 124 words
A recording data modulating apparatus in which M-bit original data is converted into an N-bit recording code, where N is greater than M, said apparatus comprising: a modulation table in which there is stored an M-N modulation code in which a number of consecutive "0's" is less than 4 and in which a ratio between a maximum magnetic state transition time interval Tmax and a minimum magnetic state transition time interval Tmin of the stored M-N modulation code is less than 4; synchronizing pattern generating means for generating a synchronizing signal; and multiplexing means receiving said synchronizing signal and a modulation code signal read from said modulation table for multiplexing said synchronizing signal and said modulation code signal to form a recording data signal.
Claim 3
Dependent Claim 33 words
The recording data modulating apparatus according to claim 1, wherein said M-N modulation code is an 8-11 modulation code and Tmax/T=2.9 and Tmin/T=0.73 when T is a reference clock of said original data.
Claim 4
Dependent Claim 129 words
A reproduced data demodulating apparatus in which a synchronization of digital reproduced data is detected and said reproduced data is demodulated to obtain decoding data, said apparatus comprising: detecting means for assigning a final N-M bit in conversion data in which original data of an M-bit unit is converted into data of an N (>M)-bit unit as a terminal portion and detecting a code having a pattern that corresponds to data of a reproduced waveform of said terminal portion; determining means for determining a code having a pattern detected by said detecting means and outputting said code; decoding means for decoding said reproduced data by using the code output from said determining means; and demodulating means for demodulating an N-bit code decoded by said decoding means into M-bit data.
Claim 5
Dependent Claim 129 words
A reproduced data demodulating apparatus in which a synchronization of digital reproduced data is detected and said reproduced data is demodulated to obtain decoding data, said apparatus comprising: detecting means for assigning a final N-M bit in conversion data in which original data of an M-bit unit is converted into data of an N (>M)-bit unit as a terminal portion and detecting a code having a pattern that corresponds to data of a reproduced waveform of said terminal portion; determining means for determining a code having a pattern detected by said detecting means and outputting said code; decoding means for decoding said reproduced data by using the code output from said determining means; and demodulating means for demodulating an N-bit code decoded by said decoding means into M-bit data.
Claim 6
Dependent Claim 26 words
The reproduced data demodulating apparatus according to claim 3 wherein said decoding means decodes said reproduced data on the basis of a maximum likelihood Viterbi algorithm.
Claim 7
Dependent Claim 114 words
The reproduced data demodulating apparatus according to claim 4 wherein said detecting means comprises: reference value memory means in which there is stored a waveform value of a pattern selected as a reference from reproduced waveform patterns of said terminal portion and subtracting means for obtaining a difference between a waveform value of said reproduced waveform pattern and said reproduced data of said terminal portion; and said determining means comprises; distance calculating means for calculating a distance between said reproduced waveform pattern and said reproduced data on the basis of an output from said subtracting means and minimum value selecting means for selecting and outputting pattern data in which a calculated distance is shortest.
Claim 8
Dependent Claim 117 words
A recording data modulating apparatus in which 8-bit original data is converted into an 11-bit recording code, said apparatus comprising: a modulation table in which Tmax/T=2.0 and Tmin/T=0.73 when Tmax assumes a maximum magnetic transition interval, Tmin assumes a minimum magnetic transition interval and T is a reference clock of said original data, wherein said modulation table is addressed by the 8-bit original data and an 11-bit modulation code signal is read out therefrom; synchronizing pattern generating means for generating a synchronizing signal; and multiplexing means receiving said synchronizing signal and a modulation code signal read out from said modulation table for multiplexing said synchronizing signal and said modulation code signal to form a recording data signal.
Claim 9
Dependent Claim 117 words
A recording data modulating apparatus in which 8-bit original data is converted into an 11-bit recording code, said apparatus comprising: a modulation table in which Tmax/T=2.0 and Tmin/T=0.73 when Tmax assumes a maximum magnetic transition interval, Tmin assumes a minimum magnetic transition interval and T is a reference clock of said original data, wherein said modulation table is addressed by the 8-bit original data and an 11-bit modulation code signal is read out therefrom; synchronizing pattern generating means for generating a synchronizing signal; and multiplexing means receiving said synchronizing signal and a modulation code signal read out from said modulation table for multiplexing said synchronizing signal and said modulation code signal to form a recording data signal.
Claim 10
Dependent Claim 168 words
A reproduced data demodulating apparatus in which a synchronization of digital reproduced data is detected and said reproduced data is demodulated to obtain decoded data, said apparatus comprising: analog to digital converting means for converting the reproduced data into an 11-bit digital signal; reference value memory means in which there are stored 3-bit waveform values of code patterns selected as references; subtracting means for obtaining differences between said waveform values of code patterns stored as references and final three bits of converted reproduced data from said analog to digital converting means; pattern distance calculating means for calculating a distance between said differences output from said subtracting means and a respective waveform value of each code pattern; minimum value selecting means for selecting a minimum calculated distance from said pattern distance calculating means; decoding means for decoding said reproduced data on the basis of a maximum likelihood Viterbi algorithm into an 11-bit code; and demodulating means for demodulating said 11-bit code decoded by said decoding means into 8-bit data.
Claim 11
Dependent Claim 168 words
A reproduced data demodulating apparatus in which a synchronization of digital reproduced data is detected and said reproduced data is demodulated to obtain decoded data, said apparatus comprising: analog to digital converting means for converting the reproduced data into an 11-bit digital signal; reference value memory means in which there are stored 3-bit waveform values of code patterns selected as references; subtracting means for obtaining differences between said waveform values of code patterns stored as references and final three bits of converted reproduced data from said analog to digital converting means; pattern distance calculating means for calculating a distance between said differences output from said subtracting means and a respective waveform value of each code pattern; minimum value selecting means for selecting a minimum calculated distance from said pattern distance calculating means; decoding means for decoding said reproduced data on the basis of a maximum likelihood Viterbi algorithm into an 11-bit code; and demodulating means for demodulating said 11-bit code decoded by said decoding means into 8-bit data.

References Cited (Backward Citations)

EP0205667A1 Cited
US4716385A Cited
EP0242121A2 Cited
US4928187A Cited
JPH01151077A Cited
US5016258A Cited
JPH02131022A Cited
JPH03293819A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-10-17 1998-04-18 1998-10-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-10-17 2002-04-18 2002-10-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-10-17 2006-04-18 2006-10-18 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag