Patent US5430320A successfully refreshed from Google Patents.
US5430320A
Expired / Lapsed
US
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Thin film transistor having a lightly doped drain and an offset structure for suppressing the leakage current
Assignee: Samsung Display Co Ltd
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Filing: 1993-12-17
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Granted: 1995-07-04
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Expires: 2013-12-17
Abstract
Abstract A thin film transistor wherein generation of a leakage current is prevented to improve the operation stability thereof and a method for manufacturing the same. A polysilicon layer is formed on an insulating layer. A gate insulating layer is formed on the polysilicon layer. A gate electrode having a barrier layer formed thereon is formed on the gate insulating layer. The sidewall surface portion of the gate electrode is anodic oxidized to form a metal oxide layer on the sidewall of the gate electrode. A lightly doped drain region having a lower impurity concentration than that of source and drain regions of the thin film transistor or an offset region wherein no impurity is doped is formed in a portion of the polysilicon layer under the metal oxide layer. The thin film transistor may be manufactured by a low temperature process, and leakage current is suppressed when a reverse bias voltage is applied. Therefore, the operation stability of the thin film transistor is improved.
Inventors
- 👤 Jae-won Lee
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 10:06
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0312; H10D30/0314; H10D30/60; H10D30/67; H10D30/6729; H10D30/673; H10D30/0321; H10D30/6704; H10D30/6713; H10D30/6715; H10D30/6737; H10D30/6739; H10P; H10P14/00; H10P14/60; H10P14/63; H10P14/6302; H10P14/6324; Y; Y10; Y10S; Y10S257/00; Y10S257/90
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
100 words
A thin film transistor, comprising: an insulating substrate; a polysilicon layer comprising source and drain regions formed therein, a channel region formed between said source and drain regions, an impurity doped region formed between said source and channel regions and between said drain and channel regions; a gate insulating layer formed on said polysilicon layer; a gate electrode formed on said gate insulating layer over said channel region, said gate electrode comprising a metal; a metal oxide layer formed on the sidewalls of said gate electrode over said impurity doped region; and a barrier layer formed on said gate electrode.
Claim 2
Dependent Claim
100 words
A thin film transistor, comprising: an insulating substrate; a polysilicon layer comprising source and drain regions formed therein, a channel region formed between said source and drain regions, an impurity doped region formed between said source and channel regions and between said drain and channel regions; a gate insulating layer formed on said polysilicon layer; a gate electrode formed on said gate insulating layer over said channel region, said gate electrode comprising a metal; a metal oxide layer formed on the sidewalls of said gate electrode over said impurity doped region; and a barrier layer formed on said gate electrode.
Claim 3
Dependent Claim
25 words
The thin film transistor according to claim 1, wherein said impurity-doped region has a lower impurity concentration than that of said source and drain regions.
Claim 4
Dependent Claim
43 words
The thin film transistor according to claim 1, wherein said gate electrode comprises a metal in which an oxide is formed so as to extend outwardly during oxidization of the sidewall surface portion of said gate electrode for forming said metal oxide layer.
Claim 5
Dependent Claim
23 words
The thin film transistor according to claim 1, wherein said metal oxide layer comprises an oxide of said metal of said gate electrode.
Claim 6
Dependent Claim
38 words
The thin film transistor according to claim 1, wherein said barrier layer comprises at least one selected from the group consisting of a metal different than the metal consisting of said gate electrode, an oxide and a nitride.
Claim 7
Dependent Claim
34 words
The thin film transistor according to claim 4, wherein said barrier layer comprises at least one metal selected from the group consisting of Mo, Ta, Al, Ni, Zr, Ti, Pd, Au, Ag and Co.
Claim 8
Dependent Claim
104 words
A thin film transistor, comprising: an insulating substrate; a polysilicon layer comprising source and drain regions formed therein, a channel region formed between said source and drain regions, an offset region formed between said source and channel regions and between said drain and channel regions; a gate insulating layer formed on said polysilicon layer; a gate electrode formed on said gate insulating layer over said channel region, said gate electrode comprising a metal; a metal oxide layer formed on the sidewalls of said gate electrode over said offset region; and a barrier layer formed on both said gate electrode and said metal oxide layer.
Claim 9
Dependent Claim
104 words
A thin film transistor, comprising: an insulating substrate; a polysilicon layer comprising source and drain regions formed therein, a channel region formed between said source and drain regions, an offset region formed between said source and channel regions and between said drain and channel regions; a gate insulating layer formed on said polysilicon layer; a gate electrode formed on said gate insulating layer over said channel region, said gate electrode comprising a metal; a metal oxide layer formed on the sidewalls of said gate electrode over said offset region; and a barrier layer formed on both said gate electrode and said metal oxide layer.
Claim 10
Dependent Claim
42 words
The thin film transistor according to claim 7, wherein said gate electrode comprises a metal whose oxide is formed so as to extend inwardly during anodic oxidization of the sidewall surface portion of said gate electrode for forming said metal oxide layer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-07-03 | 1999-01-02 | 1999-07-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-07-03 | 2003-01-02 | 2003-07-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-07-03 | 2007-01-02 | 2007-07-04 | $7700.00 | Window Closed / Lapsed |