MRI multi-frequency DSB and SSB RF synthesizer

Claim 2

A frequency generator comprising a direct digital synthesizer circuit, a clock circuit providing an input to said direct digital synthesizer circuit, said direct digital synthesizer circuit having an input unit for receiving frequency control settings, and a latch for receiving a clock signal and a frequency changing signal for resetting the frequency output from said direct digital synthesizer circuit, said latch synchronizing said frequency changing signal with said clock signal and providing a synchronized reset signal to said direct digital synthesizer circuit.

Claim 3

A frequency generator as in claim 1 wherein said direct digital synthesizer circuit input unit comprises a double buffer holding two phase increment values, active and inactive, and said synchronized reset signal clocks said inactive phase increment value into an active phase increment position.

Claim 4

A frequency generator as in claim 2 wherein said direct digital synthesizer circuit provides a digitized sine wave output, and said generator further comprises a digital to analog converter for converting said digitized sine wave output to a periodic analog waveform.

Claim 5

A frequency generator as in claim 3 and further comprising a fifth order narrow bandwidth bandpass filter for receiving and filtering said periodic analog waveform.

Claim 6

A frequency generator as in claim 2 and further comprising a divider circuit wherein a clock output from said clock circuit is divided in said divider circuit for providing said clock signal.

Claim 7

A single side band generating circuit comprising a clock circuit providing an input clock signal, a first direct digital synthesizer circuit receiving said clock signal and input frequency control signals and outputting digitized sine data, a second direct digital synthesizer circuit receiving said clock signal and input frequency control signals and outputting digitized cosine data, first and second digital multipliers receiving said clock signal, and said sine wave data and said cosine wave data, respectively, said first and second digital multipliers receiving modulation data, a latch circuit receiving said clock signal and a strobe input signal and providing first and second strobe signals to said first and second digital multipliers, and a digital adder receiving the outputs from said first and second digital multipliers and outputting modulated digitized single side band data.

Claim 8

A single side band generating circuit comprising a clock circuit providing an input clock signal, a first direct digital synthesizer circuit receiving said clock signal and input frequency control signals and outputting digitized sine data, a second direct digital synthesizer circuit receiving said clock signal and input frequency control signals and outputting digitized cosine data, first and second digital multipliers receiving said clock signal, and said sine wave data and said cosine wave data, respectively, said first and second digital multipliers receiving modulation data, a latch circuit receiving said clock signal and a strobe input signal and providing first and second strobe signals to said first and second digital multipliers, and a digital adder receiving the outputs from said first and second digital multipliers and outputting modulated digitized single side band data.

Claim 9

A circuit as in claim 6 further comprising a digital to analog converter connected to receive said modulated digitized single side band data for converting said data to an analog periodic waveform.

Claim 10

A circuit as in claim 6 wherein said first and said second direct digital synthesizer circuits are first and second frequency sections of a single component.

Claim 11

A circuit as in claim 6 wherein said modulated digitized single side band data contains in-phase and quadrature modulation data, said circuit further comprises a digital to analog converter for converting said modulated single side band data to a modulated analog signal, and a band pass filter for filtering said modulated analog signal.

Claim 12

A double side band/single side band circuit comprising an oscillator circuit providing a clock signal, first and second direct digital synthesizer circuits receiving said clock signal and input frequency control signals and outputting digitized sine wave data and cosine wave data, a first digital multiplier receiving said clock signal, said digitized sine wave data, even function modulation data and a strobe, a second digital multiplier receiving said clock signal, said digitized cosine wave data, a strobe, and odd function modulation data for single side band operation, said odd function modulation data being set to zero for double side band operation, a latch circuit receiving said clock signal and an input strobe signal and outputting said strobe, and a digital adder receiving the output of said first digital multiplier and said second digital multiplier and providing modulated digitized output data.

Claim 13

A double side band/single side band circuit comprising an oscillator circuit providing a clock signal, first and second direct digital synthesizer circuits receiving said clock signal and input frequency control signals and outputting digitized sine wave data and cosine wave data, a first digital multiplier receiving said clock signal, said digitized sine wave data, even function modulation data and a strobe, a second digital multiplier receiving said clock signal, said digitized cosine wave data, a strobe, and odd function modulation data for single side band operation, said odd function modulation data being set to zero for double side band operation, a latch circuit receiving said clock signal and an input strobe signal and outputting said strobe, and a digital adder receiving the output of said first digital multiplier and said second digital multiplier and providing modulated digitized output data.

Claim 14

A circuit as in claim 10 further comprising a digital to analog converter connected to receive said modulated digitized output data for converting said data to an analog periodic waveform.

Claim 15

A circuit as in claim 11 further comprising a narrow band pass filter for receiving and filtering said analog periodic waveform and reducing sidebands generated by the updating of the modulation data.

Claim 16

A circuit as in claim 10 wherein said oscillator circuit comprises a crystal oscillator and a frequency divider.

Claim 17

A circuit as in claim 10 wherein the polarity of the odd function modulation data in the single side band mode is set to select the upper side band or the lower side band.

Claim 18

A frequency generating circuit comprising a single crystal oscillator providing a clock, first and second direct digital synthesizer circuits, each having an input for receiving the output of said oscillator and an input for receiving a frequency control input, a latch associated with said second direct digital synthesizer circuit for synchronizing with said oscillator an input frequency change signal and providing a synchronized clock signal to said direct digital synthesizer, a first circuit connected to the outputs of said first direct digital synthesizer circuit for providing a first center frequency signal and a second output circuit connected to said second direct digital synthesizer circuit for providing a ΔF frequency signal, third and fourth direct digital synthesizer circuits having inputs for receiving a frequency control input and clock signals and providing digitized sine and cosine wave data outputs, a first multiplier for receiving said clock signal, said digitized sine wave data, modulation data and a first strobe, a second multiplier for receiving said clock, said digitized cosine wave data, second modulation data and a second strobe, a second latch for synchronizing a strobe signal input to said clock signal to provide said first and second strobe, an adder for adding the outputs of said first and said second multipliers, and an output circuit for providing modulated output data.

Claim 19

A frequency generating circuit comprising a single crystal oscillator providing a clock, first and second direct digital synthesizer circuits, each having an input for receiving the output of said oscillator and an input for receiving a frequency control input, a latch associated with said second direct digital synthesizer circuit for synchronizing with said oscillator an input frequency change signal and providing a synchronized clock signal to said direct digital synthesizer, a first circuit connected to the outputs of said first direct digital synthesizer circuit for providing a first center frequency signal and a second output circuit connected to said second direct digital synthesizer circuit for providing a ΔF frequency signal, third and fourth direct digital synthesizer circuits having inputs for receiving a frequency control input and clock signals and providing digitized sine and cosine wave data outputs, a first multiplier for receiving said clock signal, said digitized sine wave data, modulation data and a first strobe, a second multiplier for receiving said clock, said digitized cosine wave data, second modulation data and a second strobe, a second latch for synchronizing a strobe signal input to said clock signal to provide said first and second strobe, an adder for adding the outputs of said first and said second multipliers, and an output circuit for providing modulated output data.

Claim 20

A circuit as in claim 15 wherein said modulated output data contains amplitude, quadrature modulated output data.

Claim 21

A circuit as in claim 15 wherein said modulated output data contain single side band modulated data.

Claim 22

A circuit as in claim 15 wherein a line carrying said second modulation data is set to zero and said modulated output is modulated double side band data.

Claim 25

A multiple frequency generator comprising a single oscillator for producing a clock frequency, a first section comprising a direct digital synthesizer circuit connected to said oscillator for generating a first frequency, a second section comprising a direct digital synthesizer circuit connected to said oscillator, and in addition a frequency divider and a latch connected between said oscillator and said direct digital synthesizer circuit, for generating a second variable frequency, and a third section comprising direct digital synthesizer circuits connected via a divider to said oscillator for generating a single side band/double side band signal.

Claim 26

A multiple frequency generator comprising a single oscillator for producing a clock frequency, a first section comprising a direct digital synthesizer circuit connected to said oscillator for generating a first frequency, a second section comprising a direct digital synthesizer circuit connected to said oscillator, and in addition a frequency divider and a latch connected between said oscillator and said direct digital synthesizer circuit, for generating a second variable frequency, and a third section comprising direct digital synthesizer circuits connected via a divider to said oscillator for generating a single side band/double side band signal.

Claim 27

A MRI transmitter comprising a local frequency generator and a RF frequency generating channel, said frequency generator comprising a single crystal oscillator for producing a clock frequency, a center frequency section including a direct digital synthesizer circuit for producing a center frequency with said clock frequency, a variable ΔF frequency section including a direct digital synthesizer circuit for producing a variable ΔF frequency and a latch for synchronizing said variable ΔF frequency with said clock frequency, a single side band/double side band section including direct digital synthesizer circuits for producing a modulated side band signal from a sub multiple of said clock frequency, said RF frequency generating channel comprising, a first mixer for mixing said center frequency and a sub multiple of said clock frequency, a second mixer for mixing said ΔF frequency and said modulated side band signal, and a third mixer for mixing the outputs of said first and second mixers.

Claim 28

A MRI transmitter comprising a local frequency generator and a RF frequency generating channel, said frequency generator comprising a single crystal oscillator for producing a clock frequency, a center frequency section including a direct digital synthesizer circuit for producing a center frequency with said clock frequency, a variable ΔF frequency section including a direct digital synthesizer circuit for producing a variable ΔF frequency and a latch for synchronizing said variable ΔF frequency with said clock frequency, a single side band/double side band section including direct digital synthesizer circuits for producing a modulated side band signal from a sub multiple of said clock frequency, said RF frequency generating channel comprising, a first mixer for mixing said center frequency and a sub multiple of said clock frequency, a second mixer for mixing said ΔF frequency and said modulated side band signal, and a third mixer for mixing the outputs of said first and second mixers.