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US5488432A
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Video signal processing method for changing a video signal display format
Assignee: Laboratoire Europeen de Recherches Electroniques Avancees SNC
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Filing: 1994-12-21
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Granted: 1996-01-30
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Expires: 2014-12-21
Abstract
Abstract The present invention concerns a processing method for a video signal coded in the form of blocks of K words, this signal being written to or read from two frame memories (FM1, FM2) each including an input port, a high speed output port and a low speed output port. According to this method, the input digital video signal is formed by sets of M' blocks with N' block containing luminance data (Y1, Y2 . . . ) and M'-N' blocks containing chrominance data (C1, C2 . . . ), the blocks containing the chrominance data (C1) are written in the first memory (FM1) and the blocks containing luminance data (Y1) are written in the second memory (FM2). Then the blocks containing the luminance data and the blocks containing the chrominance data are read simultaneously on the high speed output port of each memory, the memories being inverted at each frame, and the data eventually being processed to obtain video data in output that presents a compression ratio M/N with M>N.
Inventors
- 👤 Jean-Claude Guillon
- 👤 Laurent Perdrieau
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 21:00
CPC Classifications
H; H04; H04N; H04N5/00; H04N5/14; H04N9/00; H04N9/64; H04N9/74; H04N11/00; H04N11/04; H04N5/44; H04N5/76; H04N5/907
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
181 words
A processing method for a video signal coded in a form of K words, the video signal being written into and read from first and second frame memories each including an input port, and low and high speed output ports, comprising the steps of: forming an input digital video signal from sets of M blocks with N blocks containing luminance data and M-N blocks containing corresponding chrominance data; sequentially writing the blocks of luminance and chrominance data of the input digital video signal to the frame memories, wherein for a first frame the luminance data is written to the first frame memory and the corresponding chrominance data is written to the second frame memory, and for a next frame the luminance data is alternately written to the second frame memory and the corresponding chrominance data is alternatively written to the first frame memory, and for further frames further sequentially alternating to which frame memory the luminance data and corresponding chrominance is written; and reading from the output ports of the frame memories blocks containing the luminance data and corresponding chrominance data.
Claim 2
Dependent Claim
181 words
A processing method for a video signal coded in a form of K words, the video signal being written into and read from first and second frame memories each including an input port, and low and high speed output ports, comprising the steps of: forming an input digital video signal from sets of M blocks with N blocks containing luminance data and M-N blocks containing corresponding chrominance data; sequentially writing the blocks of luminance and chrominance data of the input digital video signal to the frame memories, wherein for a first frame the luminance data is written to the first frame memory and the corresponding chrominance data is written to the second frame memory, and for a next frame the luminance data is alternately written to the second frame memory and the corresponding chrominance data is alternatively written to the first frame memory, and for further frames further sequentially alternating to which frame memory the luminance data and corresponding chrominance is written; and reading from the output ports of the frame memories blocks containing the luminance data and corresponding chrominance data.
Claim 3
Dependent Claim
11 words
The processing method according to claim 1, wherein M=4 and N=3.
Claim 4
Dependent Claim
33 words
The processing method according to claim 1, wherein the input port operates at a clock frequency of 13.5 Mhz and the high speed output port operates at a clock frequency of 27 Mhz.
Claim 5
Dependent Claim
49 words
The processing method according to any one of claims 1-3, further comprising the step of reading the blocks containing luminance data and the blocks containing corresponding chrominance data simultaneously on the low speed output port of each frame memory to obtain an output video data delayed by one frame.
Claim 6
Dependent Claim
21 words
The processing method according to claim 4, wherein the low speed output port operates at a clock frequency of 13.5 Mhz.
Claim 7
Dependent Claim
216 words
A processing method for compressing a video signal coded in a form of K words, the video signal being written into and read from first and second frame memories each including an input port, and low and high speed output ports, comprising the steps of: forming an input digital video signal from sets of M blocks with N blocks containing luminance data and M-N blocks containing corresponding chrominance data; sequentially writing the blocks of luminance and chrominance data of the input digital video signal to the frame memories, wherein for a first frame the luminance data is sampled at a first frequency and written to the first frame memory and the corresponding chrominance data is sampled at a second frequency which is less than the first frequency and is written to the second frame memory, and for a next frame the luminance data is alternately written to the second frame memory and the corresponding chrominance data is alternatively written to the first frame memory, and for further frames further sequentially alternating to which frame memory the luminance data and corresponding chrominance is written; and reading from the output ports of the frame memories an output signal of blocks containing the luminance data and corresponding chrominance data, the output signal being compressed by a ratio of M/N.
Claim 8
Dependent Claim
216 words
A processing method for compressing a video signal coded in a form of K words, the video signal being written into and read from first and second frame memories each including an input port, and low and high speed output ports, comprising the steps of: forming an input digital video signal from sets of M blocks with N blocks containing luminance data and M-N blocks containing corresponding chrominance data; sequentially writing the blocks of luminance and chrominance data of the input digital video signal to the frame memories, wherein for a first frame the luminance data is sampled at a first frequency and written to the first frame memory and the corresponding chrominance data is sampled at a second frequency which is less than the first frequency and is written to the second frame memory, and for a next frame the luminance data is alternately written to the second frame memory and the corresponding chrominance data is alternatively written to the first frame memory, and for further frames further sequentially alternating to which frame memory the luminance data and corresponding chrominance is written; and reading from the output ports of the frame memories an output signal of blocks containing the luminance data and corresponding chrominance data, the output signal being compressed by a ratio of M/N.
Claim 9
Dependent Claim
11 words
The processing method according to claim 6, wherein M=4 and N=3.
Claim 10
Dependent Claim
33 words
The processing method according to claim 6, wherein the input port operates at a clock frequency of 13.5 MHz and the high speed output port operates at a clock frequency of 27 MHz.
Claim 11
Dependent Claim
49 words
The processing method according to any one of claims 6-8, further comprising the step of reading the blocks containing luminance data and the blocks containing corresponding chrominance data simultaneously on the low speed output port of each frame memory to obtain an output video data delayed by one frame.
Claim 12
Dependent Claim
21 words
The processing method according to claim 9, wherein the low speed output port operates at a clock frequency of 13.5 MHz.
Claim 13
Dependent Claim
21 words
The processing method according to claim 6, wherein the first frequency is 10.125 MHz and the second frequency is 3.375 MHz.
Claim 14
Dependent Claim
226 words
A processing method for compressing a 4/3 format video signal coded in a form of K words, the video signal being written into and read from first and second frame memories each including an input port, and low and high speed output ports, comprising the steps of: forming an input digital video signal from sets of 4 blocks with 3 blocks containing luminance data and 1 block containing corresponding chrominance data; sequentially writing the blocks of luminance and chrominance data of the input digital video signal to the frame memories, wherein for a first frame the luminance data is sampled at a first frequency and written to the first frame memory and the corresponding chrominance data is sampled at a second frequency which is less than the first frequency and is written to the second frame memory, and for a next frame the luminance data is alternately written to the second frame memory and the corresponding chrominance data is alternatively written to the first frame memory, and for further frames further sequentially alternating to which frame memory the luminance data and corresponding chrominance is written; and reading from the high-speed output ports of the frame memories an output signal of blocks containing the luminance data and corresponding chrominance data, the output signal being compressed by a ratio of 4/3 to generate a 16/9 format video signal.
Claim 15
Dependent Claim
226 words
A processing method for compressing a 4/3 format video signal coded in a form of K words, the video signal being written into and read from first and second frame memories each including an input port, and low and high speed output ports, comprising the steps of: forming an input digital video signal from sets of 4 blocks with 3 blocks containing luminance data and 1 block containing corresponding chrominance data; sequentially writing the blocks of luminance and chrominance data of the input digital video signal to the frame memories, wherein for a first frame the luminance data is sampled at a first frequency and written to the first frame memory and the corresponding chrominance data is sampled at a second frequency which is less than the first frequency and is written to the second frame memory, and for a next frame the luminance data is alternately written to the second frame memory and the corresponding chrominance data is alternatively written to the first frame memory, and for further frames further sequentially alternating to which frame memory the luminance data and corresponding chrominance is written; and reading from the high-speed output ports of the frame memories an output signal of blocks containing the luminance data and corresponding chrominance data, the output signal being compressed by a ratio of 4/3 to generate a 16/9 format video signal.
Claim 16
Dependent Claim
33 words
The processing method according to claim 12, wherein the input port operates at a clock frequency of 13.5 MHz and the high speed output port operates at a clock frequency of 27 MHz.
Claim 17
Dependent Claim
51 words
The processing method according to either one of claims 12 or 13, further comprising the step of reading the blocks containing luminance data and the blocks containing corresponding chrominance data simultaneously on the low speed output port of each frame memory to obtain an output video data delayed by one frame.
Claim 18
Dependent Claim
21 words
The processing method according to claim 14, wherein the low speed output port operates at a clock frequency of 13.5 MHz.
Claim 19
Dependent Claim
21 words
The processing method according to claim 12, wherein the first frequency is 10.125 MHz and the second frequency is 3.375 MHz.
References Cited (Backward Citations)
US4163248A
Cited
JPS5848591A
Cited
US4864402A
Cited
EP0309875A2
Cited
US4942457A
Cited
US5005073A
Cited
EP0371270A2
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-01-29 | 1999-07-31 | 2000-01-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-01-29 | 2003-07-31 | 2004-01-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-01-29 | 2007-07-31 | 2008-01-30 | $7700.00 | Window Closed / Lapsed |