Patent US5502289A successfully refreshed from Google Patents.
US5502289A
Expired / Lapsed
US
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Stacked multi-chip modules and method of manufacturing
Assignee: National Semiconductor Corp
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Filing: 1995-03-13
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Granted: 1996-03-26
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Expires: 2015-03-13
Abstract
Abstract A circuit assembly which includes a semiconductor die having substantially parallel opposing first and second surfaces and at least one electrical contact mounted on the first surface. A first element having substantially parallel opposing first and second surfaces and at least one electrical contact mounted on one of its surfaces is mounted on and at least partially supported at its second surface by the first surface of the semiconductor die. The first element is positioned such that the semiconductor die electrical contact is exposed. A fine wire conductor having first and second ends is connected at its first end to either the semiconductor die electrical contact or the first element electrical contact. A method of manufacturing this circuit assembly is also disclosed.
Inventors
- 👤 Hem P. Takiar
- 👤 Peng-Cheng Lin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 18:48
CPC Classifications
H; H10; H10W; H10W90/00; H10W90/811; H10W70/00; H10W70/40; H10W70/464; H10W70/468; H10W72/00; H10W72/50; H10W72/851; H10W70/60; H10W72/531; H10W72/536; H10W72/5363; H10W72/541; H10W72/5449; H10W72/547; H10W72/5473; H10W72/853; H10W72/865; H10W72/874; H10W72/884; H10W72/90; H10W72/931; H10W72/932; H10W74/00; H10W90/20; H10W90/28; H10W90/701; H10W90/731; H10W90/732; H10W90/736; H10W90/751; H10W90/752; H10W90/756; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49121
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
142 words
A circuit assembly, comprising: a first semiconductor die having substantially parallel opposing first and second surfaces and at least one electrical contact disposed at the first semiconductor die first surface; a second semiconductor die having substantially parallel opposing first and second surfaces and at least one electrical contact disposed at the second semiconductor die first surface, the second semiconductor die being mounted on and at least partially supported at its second surface by the first semiconductor die first surface, the second semiconductor die having a hole extending therethrough from the second semiconductor die first surface to the second semiconductor die second surface to expose the first semiconductor die electrical contact; and a fine wire conductor having first and second ends, the first end extending through the hole in the second semiconductor die and being connected to the first semiconductor die electrical contact.
Claim 2
Dependent Claim
142 words
A circuit assembly, comprising: a first semiconductor die having substantially parallel opposing first and second surfaces and at least one electrical contact disposed at the first semiconductor die first surface; a second semiconductor die having substantially parallel opposing first and second surfaces and at least one electrical contact disposed at the second semiconductor die first surface, the second semiconductor die being mounted on and at least partially supported at its second surface by the first semiconductor die first surface, the second semiconductor die having a hole extending therethrough from the second semiconductor die first surface to the second semiconductor die second surface to expose the first semiconductor die electrical contact; and a fine wire conductor having first and second ends, the first end extending through the hole in the second semiconductor die and being connected to the first semiconductor die electrical contact.
Claim 3
Dependent Claim
24 words
The circuit assembly of claim 1, wherein the second end of the fine wire conductor is connected to the second semiconductor die electrical contact.
Claim 4
Dependent Claim
44 words
The circuit assembly of claim 1, further comprising: a carrier member having a principal mounting surface and a plurality of electrical leads, wherein the first semiconductor die is mounted on and at least partially supported at its second surface by the principal mounting surface.
Claim 5
Dependent Claim
25 words
The circuit assembly of claim 3, wherein the second end of the fine wire conductor is connected to one of the plurality of electrical leads.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-03-26 | 1999-09-25 | 2000-03-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-03-26 | 2003-09-25 | 2004-03-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-03-26 | 2007-09-25 | 2008-03-26 | $7700.00 | Window Closed / Lapsed |