Patent US5557797A successfully refreshed from Google Patents.
US5557797A
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Scheduling method for automatically developing hardware patterns for integrated circuits
Assignee: Ricoh Co Ltd
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Filing: 1995-12-12
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Granted: 1996-09-17
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Expires: 2015-12-12
Abstract
Abstract A scheduling method for scheduling a program comprises the steps of: extracting a plurality of traces from a given program such that each of the traces contains a plurality of program blocks executed sequentially, each of the plurality of program blocks containing one or more operators to be executed by arithmetic units of a computer and being separated from another program block in the trace by a branching step that causes a branching to or from a program block outside of the trace; extracting, in each of the plurality of traces, a critical path of the operation conducted by the operators in the trace, the critical path being formed of a plurality of reference operators, the rest of the operators forming movable operators that are conducted concurrently with one or more of the reference operators; and scheduling, in each of the traces, the processing steps of the movable operators such that the maximum of the number of the movable operators conducted concurrently to a reference operator in a given trace, is minimized.
Inventors
- 👤 Takanori Yano
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 12:17
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/46; G06F9/48; G06F9/4806; G06F9/4843; G06F9/4881
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
303 words
A method for obtaining a hardware pattern of a microprocessor based upon a program that is processed by said microprocessor, said microprocessor including a plurality of arithmetic units and a control unit that controls said plurality of arithmetics units independently, said method comprising the steps of: extracting a plurality of traces from a given program having at least one branching step, each of said plurality of traces being defined at least in part by a plurality of program blocks configured for sequential execution, each of said plurality of program blocks having at least one operator to be executed by said arithmetic units during a control operation having processing steps, and arranged such that, at least one of said plurality of program blocks is separated from another of said plurality of program blocks in an associated trace by the at least one branching step for causing a branching of the control operation to or from a program block associated with another of said plurality of traces; extracting a critical path represented by the operators in each of said plurality of traces, said critical path being defined by a plurality of reference operators from said one or more operators, the rest of the one or more operators defining movable operators executable concurrently with one or more of the plurality of reference operators during the control operation; scheduling the processing steps of the movable operators in each of said plurality of traces based upon the at least one branching step, such that upon executing the control operation, the maximum number of the movable operators executed concurrently with a reference operator in a given trace is minimized; and copying a movable operator in one of said plurality of blocks included in said associated trace to one of a plurality of program blocks included in said another trace.
Claim 2
Independent Claim
303 words
A method for obtaining a hardware pattern of a microprocessor based upon a program that is processed by said microprocessor, said microprocessor including a plurality of arithmetic units and a control unit that controls said plurality of arithmetics units independently, said method comprising the steps of: extracting a plurality of traces from a given program having at least one branching step, each of said plurality of traces being defined at least in part by a plurality of program blocks configured for sequential execution, each of said plurality of program blocks having at least one operator to be executed by said arithmetic units during a control operation having processing steps, and arranged such that, at least one of said plurality of program blocks is separated from another of said plurality of program blocks in an associated trace by the at least one branching step for causing a branching of the control operation to or from a program block associated with another of said plurality of traces; extracting a critical path represented by the operators in each of said plurality of traces, said critical path being defined by a plurality of reference operators from said one or more operators, the rest of the one or more operators defining movable operators executable concurrently with one or more of the plurality of reference operators during the control operation; scheduling the processing steps of the movable operators in each of said plurality of traces based upon the at least one branching step, such that upon executing the control operation, the maximum number of the movable operators executed concurrently with a reference operator in a given trace is minimized; and copying a movable operator in one of said plurality of blocks included in said associated trace to one of a plurality of program blocks included in said another trace.
Claim 3
Dependent Claim
75 words
A method as claimed in claim 1, wherein said step of scheduling comprises the steps of: obtaining a number of the one or more movable operators executed concurrently to a reference operator for each of the plurality of reference operators and for each possible combination of the movable operators and the reference operators; and selecting the combination wherein the maximum of the number of the movable operators conducted concurrently to a reference operator is minimized.
Claim 4
Dependent Claim
37 words
A method as claimed in claim 1, wherein said step of scheduling comprises the step of allocating the movable operators to a reference operator in which the number of the possible movable operators allocatable thereto is minimum.
Claim 5
Dependent Claim
37 words
A method as claimed in claim 3, wherein said step of scheduling comprises the step of allocating the movable operators to a reference operator in which the number of the movable operators already allocated thereto is minimum.
Claim 6
Dependent Claim
71 words
A method as claimed in claim 4, wherein said step of allocating the movable operators comprises the steps of: identifying a maximum reference operator having the maximum number of allocated movable operators in said trace; and allocating a movable operator to a selected reference operator in said trace such that the difference in the number of allocated movable operators between said maximum reference operator and said selected reference operator, becomes maximum.
Claim 7
Dependent Claim
38 words
A method as claimed in claim 3, wherein said step of scheduling comprises the step of allocating the movable operators to a reference operator, starting from the movable operator that has a smallest degree of freedom of scheduling.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-09-17 | 2000-03-18 | 2000-09-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-09-17 | 2004-03-18 | 2004-09-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-09-17 | 2008-03-18 | 2008-09-17 | $7700.00 | Window Closed / Lapsed |