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US5614747A
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Method for manufacturing a flash EEPROM cell
Assignee: SK Hynix Inc
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Filing: 1995-07-28
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Granted: 1997-03-25
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Expires: 2015-07-28
Abstract
Abstract The present invention discloses a split gate type flash EEPROM cell and a method of manufacturing the same which can prevent over-erasure of the flash EEPROM cell and decrease the cell area by forming a floating gate in the form of a spacer on a side wall of a select gate and by forming a control gate to surround the select gate and the floating gate.
Inventors
- 👤 Byung J. Ahn
- 👤 Jae C. An
- 👤 Hee Y. Lee
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 07:18
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/68; H10D30/681; H10D30/684; H10D30/685; H10D64/00; H10D64/20; H10D64/27; H10D64/311; H10D64/411; H10D64/511
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
105 words
A flash EEPROM cell comprising: a select gate oxide, a select gate and a dielectric oxide formed in stacks on a selected region of a p-type substrate; a tunnel oxide layer formed on one side wall of said select gate oxide, select gate and dielectric oxide and on a selected region of said p-type substrate extended below from said side wall; a floating gate formed on said tunnel oxide; a drain region and a source region formed on said p-type substrate; an inter-poly oxide formed on the entire structure after the formation of said tunnel oxide; and a control gate formed on said inter-poly oxide.
Claim 2
Dependent Claim
105 words
A flash EEPROM cell comprising: a select gate oxide, a select gate and a dielectric oxide formed in stacks on a selected region of a p-type substrate; a tunnel oxide layer formed on one side wall of said select gate oxide, select gate and dielectric oxide and on a selected region of said p-type substrate extended below from said side wall; a floating gate formed on said tunnel oxide; a drain region and a source region formed on said p-type substrate; an inter-poly oxide formed on the entire structure after the formation of said tunnel oxide; and a control gate formed on said inter-poly oxide.
Claim 3
Dependent Claim
20 words
The flash EEPROM cell of claim 1, wherein said tunnel oxide is formed with a thickness of about 100 Å.
Claim 4
Dependent Claim
23 words
The flash EEPROM cell of claim 1, wherein said floating gate is formed with a polysilicon and in the form of a spacer.
Claim 5
Independent Claim
127 words
A method of manufacturing a flash EEPROM cell comprising, the steps of: growing a select gate oxide on a p-type substrate, and sequentially forming a select gate and a dielectric oxide on selected regions of said select gate oxide; growing a tunnel oxide after removing exposed portion of said select gate oxide, and thereafter, forming a floating gate on said tunnel oxide formed on both side walls of said select gate and dielectric oxide; removing either one of said floating gates; forming a drain region and a source region on said p-type substrate by n-type high concentration ion implantation process; and forming an inter-poly oxide on the entire structure after formation of said drain and source regions and, thereafter, forming a control gate on said inter-poly oxide.
Claim 6
Independent Claim
127 words
A method of manufacturing a flash EEPROM cell comprising, the steps of: growing a select gate oxide on a p-type substrate, and sequentially forming a select gate and a dielectric oxide on selected regions of said select gate oxide; growing a tunnel oxide after removing exposed portion of said select gate oxide, and thereafter, forming a floating gate on said tunnel oxide formed on both side walls of said select gate and dielectric oxide; removing either one of said floating gates; forming a drain region and a source region on said p-type substrate by n-type high concentration ion implantation process; and forming an inter-poly oxide on the entire structure after formation of said drain and source regions and, thereafter, forming a control gate on said inter-poly oxide.
Claim 7
Dependent Claim
18 words
The method of claim 4, wherein said tunnel oxide is formed with a thickness of about 100 Å.
Claim 8
Dependent Claim
20 words
The method of claim 4, wherein said floating gate is formed with polysilicon and in the form of a spacer.
Claim 9
Dependent Claim
76 words
A flash EEPROM cell comprising: a tunnel oxide, a floating gate, an inter-poly oxide and a control gate formed in stacks on a selected region of a p-type substrate; a select gate oxide formed on entire structure after formation of said control gate; select gates formed on said select gate oxide formed on both side walls of said floating gate and control gate; and a source region and a drain region formed on said p-type substrate.
Claim 10
Dependent Claim
76 words
A flash EEPROM cell comprising: a tunnel oxide, a floating gate, an inter-poly oxide and a control gate formed in stacks on a selected region of a p-type substrate; a select gate oxide formed on entire structure after formation of said control gate; select gates formed on said select gate oxide formed on both side walls of said floating gate and control gate; and a source region and a drain region formed on said p-type substrate.
Claim 11
Dependent Claim
27 words
The flash EEPROM cell of claim 7 further comprising a select gate channel region formed in a selected region of said p-type substrate below said select gate.
Claim 12
Dependent Claim
19 words
The flash EEPROM cell of claim 7, wherein said tunnel oxide is formed with a thickness of 100 Å.
Claim 13
Dependent Claim
23 words
The flash EEPROM cell of claim 7, wherein said select gate is formed with a polysilicon and in the form of a spacer.
Claim 14
Independent Claim
126 words
A method of manufacturing a flash EEPROM cell comprising the steps of: growing a tunnel oxide on a p-type substrate, and sequentially forming a floating gate, an inter-poly oxide and a control gate on a selected region on said tunnel oxide; forming a drain region by n-type high concentration ion implantation process in a selected region of said p-type substrate; forming a select gate channel region by p-type ion implantation process on said p-type substrate; growing a select gate oxide layer on the entire structure after p-type ion implantation process is advanced and, thereafter, forming a select gate on said tunnel oxide formed on both side walls of said floating gate and control gate; and forming a source region by high concentration n-type ion implantation process.
Claim 15
Independent Claim
126 words
A method of manufacturing a flash EEPROM cell comprising the steps of: growing a tunnel oxide on a p-type substrate, and sequentially forming a floating gate, an inter-poly oxide and a control gate on a selected region on said tunnel oxide; forming a drain region by n-type high concentration ion implantation process in a selected region of said p-type substrate; forming a select gate channel region by p-type ion implantation process on said p-type substrate; growing a select gate oxide layer on the entire structure after p-type ion implantation process is advanced and, thereafter, forming a select gate on said tunnel oxide formed on both side walls of said floating gate and control gate; and forming a source region by high concentration n-type ion implantation process.
Claim 16
Dependent Claim
19 words
The method of claim 11, wherein said tunnel oxide layer is formed with a thickness of about 100 Å.
Claim 17
Dependent Claim
20 words
The method of claim 11, wherein said select gate is formed with polysilicon and in the form of a spacer.
References Cited (Backward Citations)
US5338952A
Cited
US5284784A
Cited
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