Patent US5700737A successfully refreshed from Google Patents.
US5700737A
Expired / Lapsed
US
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PECVD silicon nitride for etch stop mask and ozone TEOS pattern sensitivity elimination
Assignee: Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Filing: 1996-02-26
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Granted: 1997-12-23
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Expires: 2016-02-26
Abstract
Abstract This invention provides a method for forming dense electrode patterns having a high aspect ratio in a conductor metal layer. The method uses silicon nitride deposited using plasma enhanced chemical vapor deposition, PECVD, as an etch stop mask to protect the conductor metal and anti reflection coating when etching the electrode patterns. The PECVD silicon nitride is also used a mask to eliminate pattern dependence when forming inter-metal dielectric layers. The PECVD silicon nitride is also used as an etch stop mask when forming vias in the inter-metal dielectric for electrical conduction between electrode pattern layers.
Inventors
- 👤 Chen-Hua Yu
- 👤 Syun-Ming Jang
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 20:02
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/081; H10P; H10P50/00; H10P50/71; H10P76/00; H10P76/20; H10P76/204; H10P76/2041; H10P76/2043; H10W20/031; H10W20/056; H10W20/063
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
257 words
A method of forming electrode patterns, comprising the steps of: providing an integrated circuit element having devices formed therein; providing a base dielectric layer formed on said integrated circuit element; forming a conductor metal layer on said base dielectric layer; forming an antireflection material layer on said conductor metal layer, wherein said antireflection material is titanium nitride; forming a silicon nitride etch stop layer on said antireflection material layer; forming a photoresist layer on said silicon nitride etch stop layer; forming an electrode pattern in said photoresist using photolithographic techniques; forming said electrode pattern in said silicon nitride etch stop layer by means of anisotropic dry etching using said electrode pattern formed in said photoresist as a mask and a first etchant; forming said electrode pattern in said antireflection material by means of anisotropic dry etching using said electrode pattern formed in said photoresist and said electrode pattern formed in said silicon nitride etch stop layer as a mask and BCl 3 +Cl 2 as an etchant; forming said electrode pattern in said conductor metal by means of anisotropic dry etching using said electrode pattern formed in said photoresist and said electrode pattern formed in said silicon nitride etch stop layer as a mask and a third etchant; removing said electrode pattern formed in said photoresist; and forming an inter-metal dielectric layer over said integrated circuit element covering said electrode pattern formed in said silicon nitride, said electrode pattern formed in said antireflection material, said electrode pattern formed in said conductor metal, and said base dielectric layer.
Claim 2
Independent Claim
257 words
A method of forming electrode patterns, comprising the steps of: providing an integrated circuit element having devices formed therein; providing a base dielectric layer formed on said integrated circuit element; forming a conductor metal layer on said base dielectric layer; forming an antireflection material layer on said conductor metal layer, wherein said antireflection material is titanium nitride; forming a silicon nitride etch stop layer on said antireflection material layer; forming a photoresist layer on said silicon nitride etch stop layer; forming an electrode pattern in said photoresist using photolithographic techniques; forming said electrode pattern in said silicon nitride etch stop layer by means of anisotropic dry etching using said electrode pattern formed in said photoresist as a mask and a first etchant; forming said electrode pattern in said antireflection material by means of anisotropic dry etching using said electrode pattern formed in said photoresist and said electrode pattern formed in said silicon nitride etch stop layer as a mask and BCl 3 +Cl 2 as an etchant; forming said electrode pattern in said conductor metal by means of anisotropic dry etching using said electrode pattern formed in said photoresist and said electrode pattern formed in said silicon nitride etch stop layer as a mask and a third etchant; removing said electrode pattern formed in said photoresist; and forming an inter-metal dielectric layer over said integrated circuit element covering said electrode pattern formed in said silicon nitride, said electrode pattern formed in said antireflection material, said electrode pattern formed in said conductor metal, and said base dielectric layer.
Claim 3
Dependent Claim
20 words
The method of claim 1 wherein said silicon nitride etch stop layer is formed using plasma enhanced chemical vapor deposition.
Claim 4
Dependent Claim
20 words
The method of claim 1 wherein said silicon nitride layer has a thickness of between about 200 and 2000 Angstroms.
Claim 5
Dependent Claim
20 words
The method of claim 1 wherein said antireflection material layer has a thickness of between about 50 and 1500 Angstroms.
Claim 6
Dependent Claim
16 words
The method of claim 1 wherein said inter-metal dielectric layer is silicon dioxide formed using ozone--tetra-ethyl-ortho-silicate.
Claim 7
Dependent Claim
12 words
The method of claim 1 wherein said conductor metal is aluminum copper.
Claim 8
Dependent Claim
15 words
The method of claim 1 wherein said first etchant is CF 4 +CHF 3 .
Claim 9
Dependent Claim
15 words
The method of claim 1 wherein said third etchant is BCl 3 +Cl 2 .
Claim 10
Independent Claim
464 words
A method of forming vias in dielectric material, comprising the steps of: providing an integrated circuit element having devices formed therein; providing a base dielectric layer formed on said integrated circuit element; forming a conductor metal layer having contact regions on said base dielectric layer; forming an antireflection material layer on said conductor metal layer; forming a silicon nitride etch stop layer on said antireflection material layer formed on said conductor metal layer wherein said antireflection material layer is between said silicon nitride etch stop layer and said conductor metal layer; forming a first photoresist layer on said silicon nitride etch stop layer; forming an electrode pattern in said first photoresist layer wherein said electrode pattern includes said contact regions; forming said electrode pattern in said silicon nitride etch stop layer by means of etching using said electrode pattern formed in said first photoresist layer as a mask; forming said electrode pattern in said antireflection material layer by means of etching using said electrode pattern formed in said etch stop layer and said electrode pattern formed in said first photoresist layer as a mask; forming said electrode pattern in said conductor metal layer by means of etching using said electrode pattern formed in said etch stop layer and said electrode pattern formed in said first photoresist layer as a mask; removing said electrode pattern formed in said first photoresist layer; forming an inter-metal dielectric layer over said integrated circuit element covering said electrode pattern formed in said conductor metal layer, said antireflection material layer, and said silicon nitride etch stop layer; forming a layer of second photoresist having holes wherein said holes in said layer of second photoresist are directly over said contact regions of said electrode pattern formed in said conductor metal layer; forming via holes in said inter-metal dielectric layer directly over said contact regions of said electrode pattern formed in said conductor metal layer by means of dry etching using said layer of second photoresist having holes as a mask and a first etchant wherein said first etchant will not remove said silicon nitride etch stop layer, thereby exposing that part of said silicon nitride etch stop layer directly over said contact regions of said electrode pattern formed in said conductor metal layer; removing that part of said silicon nitride etch stop layer directly over said contact regions of said electrode pattern formed in said conductor metal layer after said via holes in said inter-metal dielectric layer have been formed by means of dry etching using said layer of second photoresist having holes and said via holes in said inter-metal dielectric layer as a mask and a second etchant; removing said layer of second photoresist having holes; and filling said via holes in said inter-metal dielectric layer with a via metal.
Claim 11
Independent Claim
464 words
A method of forming vias in dielectric material, comprising the steps of: providing an integrated circuit element having devices formed therein; providing a base dielectric layer formed on said integrated circuit element; forming a conductor metal layer having contact regions on said base dielectric layer; forming an antireflection material layer on said conductor metal layer; forming a silicon nitride etch stop layer on said antireflection material layer formed on said conductor metal layer wherein said antireflection material layer is between said silicon nitride etch stop layer and said conductor metal layer; forming a first photoresist layer on said silicon nitride etch stop layer; forming an electrode pattern in said first photoresist layer wherein said electrode pattern includes said contact regions; forming said electrode pattern in said silicon nitride etch stop layer by means of etching using said electrode pattern formed in said first photoresist layer as a mask; forming said electrode pattern in said antireflection material layer by means of etching using said electrode pattern formed in said etch stop layer and said electrode pattern formed in said first photoresist layer as a mask; forming said electrode pattern in said conductor metal layer by means of etching using said electrode pattern formed in said etch stop layer and said electrode pattern formed in said first photoresist layer as a mask; removing said electrode pattern formed in said first photoresist layer; forming an inter-metal dielectric layer over said integrated circuit element covering said electrode pattern formed in said conductor metal layer, said antireflection material layer, and said silicon nitride etch stop layer; forming a layer of second photoresist having holes wherein said holes in said layer of second photoresist are directly over said contact regions of said electrode pattern formed in said conductor metal layer; forming via holes in said inter-metal dielectric layer directly over said contact regions of said electrode pattern formed in said conductor metal layer by means of dry etching using said layer of second photoresist having holes as a mask and a first etchant wherein said first etchant will not remove said silicon nitride etch stop layer, thereby exposing that part of said silicon nitride etch stop layer directly over said contact regions of said electrode pattern formed in said conductor metal layer; removing that part of said silicon nitride etch stop layer directly over said contact regions of said electrode pattern formed in said conductor metal layer after said via holes in said inter-metal dielectric layer have been formed by means of dry etching using said layer of second photoresist having holes and said via holes in said inter-metal dielectric layer as a mask and a second etchant; removing said layer of second photoresist having holes; and filling said via holes in said inter-metal dielectric layer with a via metal.
Claim 12
Dependent Claim
20 words
The method of claim 9 wherein said silicon nitride etch stop layer is formed using plasma enhanced chemical vapor deposition.
Claim 13
Dependent Claim
22 words
The method of claim 9 wherein said silicon nitride etch stop layer has a thickness of between about 200 and 2000 Angstroms.
Claim 14
Dependent Claim
13 words
The method of claim 9 wherein said antireflection material layer is titanium nitride.
Claim 15
Dependent Claim
20 words
The method of claim 9 wherein said antireflection material layer has a thickness of between about 50 and 1500 Angstroms.
Claim 16
Dependent Claim
17 words
The method of claim 9 wherein said interlevel dielectric layer is silicon dioxide formed using ozone--tetraethyl orthosilicate.
Claim 17
Dependent Claim
13 words
The method of claim 9 wherein said conductor metal layer is aluminum copper.
Claim 18
Dependent Claim
15 words
The method of claim 9 wherein said first etchant is C 4 F 8 +CO.
Claim 19
Dependent Claim
16 words
The method of claim 9 wherein said second etchant comprises CF 4 and CHF 3 .
Claim 20
Dependent Claim
16 words
The method of claim 9 wherein said second etchant comprises CF 4 and SF 6 .
Claim 21
Dependent Claim
16 words
The method of claim 9 wherein said second etchant comprises CHF 3 and SF 6 .
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-12-22 | 2001-06-23 | 2001-12-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-12-22 | 2005-06-23 | 2005-12-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-12-22 | 2009-06-23 | 2009-12-23 | $7700.00 | Window Closed / Lapsed |