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US5708285A
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Non-volatile semiconductor information storage device
Assignee: Mitsubishi Electric Corp
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Filing: 1995-09-11
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Granted: 1998-01-13
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Expires: 2015-09-11
Abstract
Abstract A non-volatile semiconductor storage device with which a multi-value memory is realized and the amount of information storable is increased without increasing the number of memory transistors and the area occupied thereby. A gate electrode portion 20a of each memory transistor has a two-layer floating gate structure comprising two floating gate electrodes 22a, 22b and a control gate electrode 24 which are substantially vertically laminated one above another. The non-volatile semiconductor storage device is thereby constructed as a multi-value memory capable of providing a state "1" where electrons are injected into the first floating gate electrode 22a, a state "0" where electrons are injected into the first and second floating gate electrodes 22a, 22b, and a state "2" where electrons are withdrawn from the first and second floating gate electrodes 22a, 22b.
Inventors
- 👤 Naoko Otani
- 👤 Toshiharu Katayama
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 18:39
CPC Classifications
H; H10; H10B; H10B41/00; G; G11; G11C; G11C11/00; G11C11/56; G11C11/5621; G11C16/00; G11C16/02; G11C16/04; G11C16/0408; G11C16/0441; G11C16/0458; H10B69/00; H10D; H10D30/00; H10D30/60; H10D30/68; H10D30/687; G11C2211/00; G11C2211/56; G11C2211/561; G11C2211/5612
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
169 words
A non-volatile semiconductor information storage device including: a semiconductor substrate having a first conductivity type; and a plurality of memory transistors on said semiconductor substrate, each of said memory transistors comprising: a source region and a drain region in said semiconductor substrate and having a second conductivity type, opposite the first conductivity type, of said semiconductor substrate; a gate electrode on said semiconductor substrate between said source region and said drain region and having, laminated in a stack successively on said semiconductor substrate, a first gate oxide film, a first floating gate electrode, a gate insulating film, a second floating gate electrode, a second gate oxide film, a control gate electrode, and a third gate oxide film so that electrons are injected into said first floating gate electrode from said semiconductor substrate through said first gate oxide film and electrons are injected into said second floating gate electrode from said control gate electrode through said second gate oxide film; and an erase gate electrode located beside said gate electrode.
Claim 2
Dependent Claim
169 words
A non-volatile semiconductor information storage device including: a semiconductor substrate having a first conductivity type; and a plurality of memory transistors on said semiconductor substrate, each of said memory transistors comprising: a source region and a drain region in said semiconductor substrate and having a second conductivity type, opposite the first conductivity type, of said semiconductor substrate; a gate electrode on said semiconductor substrate between said source region and said drain region and having, laminated in a stack successively on said semiconductor substrate, a first gate oxide film, a first floating gate electrode, a gate insulating film, a second floating gate electrode, a second gate oxide film, a control gate electrode, and a third gate oxide film so that electrons are injected into said first floating gate electrode from said semiconductor substrate through said first gate oxide film and electrons are injected into said second floating gate electrode from said control gate electrode through said second gate oxide film; and an erase gate electrode located beside said gate electrode.
Claim 3
Dependent Claim
23 words
The non-volatile semiconductor information storage device according to claim 1 wherein said gate insulating film is thicker than said second gate oxide film.
Claim 4
Dependent Claim
170 words
A non-volatile semiconductor information storage device including: a semiconductor substrate having a first conductivity type; and a plurality of memory transistors on said semiconductor substrate, each of said memory transistors comprising: a source region and a drain region in said semiconductor substrate and having a second conductivity type, opposite the first conductivity type, of said semiconductor substrate; a gate electrode on said semiconductor substrate between said source region and said drain region and having, laminated in a stack successively on said semiconductor substrate, a first gate oxide film, a first floating gate electrode, a second gate oxide film, a second floating gate electrode, a gate insulating film, a control gate electrode, and a third gate oxide film so that electrons are injected into said first floating gate electrode from said semiconductor substrate through said first gate oxide film and electrons are injected into said second floating gate electrode from said first floating gate electrode through said second gate oxide film; and an erase gate electrode located beside said gate electrode.
Claim 5
Dependent Claim
170 words
A non-volatile semiconductor information storage device including: a semiconductor substrate having a first conductivity type; and a plurality of memory transistors on said semiconductor substrate, each of said memory transistors comprising: a source region and a drain region in said semiconductor substrate and having a second conductivity type, opposite the first conductivity type, of said semiconductor substrate; a gate electrode on said semiconductor substrate between said source region and said drain region and having, laminated in a stack successively on said semiconductor substrate, a first gate oxide film, a first floating gate electrode, a second gate oxide film, a second floating gate electrode, a gate insulating film, a control gate electrode, and a third gate oxide film so that electrons are injected into said first floating gate electrode from said semiconductor substrate through said first gate oxide film and electrons are injected into said second floating gate electrode from said first floating gate electrode through said second gate oxide film; and an erase gate electrode located beside said gate electrode.
Claim 6
Dependent Claim
23 words
The non-volatile semiconductor information storage device according to claim 3 wherein said gate insulating film is thicker than said second gate oxide film.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-01-12 | 2001-07-14 | 2002-01-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-01-12 | 2005-07-14 | 2006-01-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-01-12 | 2009-07-14 | 2010-01-13 | $7700.00 | Window Closed / Lapsed |