Patent US2160227A successfully refreshed from Google Patents.
Patent US5724364A successfully refreshed from Google Patents.
US5724364A
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US
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Binarization circuit
Assignee: Olympus Corp
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Filing: 1996-03-06
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Granted: 1998-03-03
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Expires: 2016-03-06
Abstract
Abstract A period extracting section extracts a specific period in a dot code in an image signal corresponding to the dot code, and this specific period is supplied field by field to a maximum value detection section and a minimum value detection section via a detection gate. A threshold value detection section computes the binary threshold value from the detected field-by-field maximum value and minimum value, and holds it in a data holding section. A comparator compares the held threshold value with an image signal with the dot period emphasized by a signal processor to thereby binarize the image signal corresponding to the dot code.
Inventors
- 👤 Takeshi Mori
- 👤 Kosei Tamiya
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 14:21
CPC Classifications
G; G06; G06V; G06V10/00; G06V10/20; G06V10/28
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
219 words
A binarization circuit for use in an information reproduction system comprising reading means for optically scanning and reading a dot code from a recording medium on which multimedia information including at least audio information, image information and digital code data is recorded in optically readable dot codes, a binarization circuit for binarizing an image signal corresponding to said dot code read by said reading means, processing means for performing a predetermined process on binary data from said binarization circuit to restore said binary data to original multimedia information, and output means for reproducing and outputting each pieces of multimedia information based on an output signal of said processing means, said binarization circuit comprising: a filter for extracting a specific period in the dot code in an image signal corresponding to said dot code read by said reading means; maximum value/minimum value detection means for detecting a maximum value and a minimum value in a predetermined unit of said specific period extracted by said filter; threshold value computing means for computing a threshold value for binarization from said maximum value and minimum value detected by said maximum value/minimum value detection means; and binarization means for binarizing said image signal corresponding to said dot code read by said reading means with said threshold value computed by said threshold value computing means.
Claim 2
Dependent Claim
219 words
A binarization circuit for use in an information reproduction system comprising reading means for optically scanning and reading a dot code from a recording medium on which multimedia information including at least audio information, image information and digital code data is recorded in optically readable dot codes, a binarization circuit for binarizing an image signal corresponding to said dot code read by said reading means, processing means for performing a predetermined process on binary data from said binarization circuit to restore said binary data to original multimedia information, and output means for reproducing and outputting each pieces of multimedia information based on an output signal of said processing means, said binarization circuit comprising: a filter for extracting a specific period in the dot code in an image signal corresponding to said dot code read by said reading means; maximum value/minimum value detection means for detecting a maximum value and a minimum value in a predetermined unit of said specific period extracted by said filter; threshold value computing means for computing a threshold value for binarization from said maximum value and minimum value detected by said maximum value/minimum value detection means; and binarization means for binarizing said image signal corresponding to said dot code read by said reading means with said threshold value computed by said threshold value computing means.
Claim 3
Dependent Claim
58 words
The binarization circuit according to claim 1, wherein said dot code has a data code equivalent to a content of multimedia information to be reproduced and a marker located at a predetermined position with respect to said data code for determining a reference reading point; and wherein said filter is designed to extract a period of said marker.
Claim 4
Dependent Claim
32 words
The binarization circuit according to claim 1, further comprising means for detecting an error from a relationship between said maximum value and minimum value detected by said maximum value/minimum value detection means.
Claim 5
Dependent Claim
37 words
The binarization circuit according to claim 1, further comprising means, provided at a preceding stage of said filter, for performing a non-linear process on the image signal corresponding to the dot code read by said reading means.
Claim 6
Dependent Claim
22 words
The binarization circuit according to claim 1, wherein said threshold value computing means computes said threshold value in a vertical blanking period.
Claim 7
Dependent Claim
58 words
The binarization circuit according to claim 1, further comprising a signal processor for receiving an image signal corresponding to the dot code read by said reading means and supplying a resultant signal of one-dimensional wave equalization of said image signal in a same direction as a modulation direction of said dot code, as a signal to be binarized.
Claim 8
Dependent Claim
23 words
The binarization circuit according to claim 6, wherein said wave equalization in said signal processor emphasizes a dot period of said dot code.
Claim 9
Dependent Claim
44 words
The binarization circuit according to claim 1, further comprising light amount control means for discretely controlling an amount of light of a light source as an element of said reading means, based on said maximum value detected by said maximum value/minimum value detection means.
Claim 10
Dependent Claim
21 words
The binarization circuit according to claim 8, wherein said light amount control means controls said amount of light in two levels.
Claim 11
Dependent Claim
38 words
The binarization circuit according to claim 8, further comprising means for altering said threshold value computed by said threshold value computing means based on a change in said amount of light caused by said light amount control means.
Claim 12
Dependent Claim
60 words
The binarization circuit according to claim 8, wherein said light amount control means includes exposure time control means for controlling an amount of light based on an exposure time, and said exposure time control means defines an exposure control time range within a maximum allowable amount of movement during exposure in consideration of movement-originated blurring at a maximum scan speed.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-03-02 | 2001-09-01 | 2002-03-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-03-02 | 2005-09-01 | 2006-03-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-03-02 | 2009-09-01 | 2010-03-03 | $7700.00 | Window Closed / Lapsed |