Patent US5726902A successfully refreshed from Google Patents.
US5726902A
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Method and apparatus for characterizing timing behavior of datapaths for integrated circuit design and fabrication
Assignee: Philips Semiconductors Inc
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Filing: 1995-06-07
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Granted: 1998-03-10
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Expires: 2015-06-07
Abstract
Abstract A method and apparatus for characterizing the timing behavior of datapath in integrated circuit design and fabrication. A set of circuit specifications for an integrated circuit are developed and described in a hardware description language (HDL) description. A datapath library including datapath cells and a gate library including primitive gate cells are provided, and a netlist is synthesized from the HDL description. The netlist is composed of datapath cells from the datapath library and primitive gate cells from the gate library. If a datapath cell instance in the netlist does not meet the timing constraints imposed by a user for the circuit, an alternative datapath cell instance can be substituted for that cell instance in a resynthesis and optimization step. An integrated circuit is preferably fabricated as specified by the resynthesized netlist. The netlist is preferably resynthesized multiple times in an iterative loop to optimize the netlist according to the constraints. The timing information for alternative cells used in the resynthesis of the netlist can be retrieved from a timing database in one embodiment. Timing information for datapath cells is stored in the timing database in a pre-characterization process, and the location of the timing information in the timing database is stored in a query database. In another embodiment, timing information for alternative datapath cells is calculated dynamically during the resynthesis process for optimizing the timing of a netlist.
Inventors
- 👤 Mossaddeq Mahmood
- 👤 Mandalagiri Chandrasekhar
- 👤 Arnold Ginetti
- 👤 Balmukund K. Sharma
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 07:52
CPC Classifications
G; G06; G06F; G06F30/00; G06F30/30
Claims Analysis
Total Claims: 41
Claim 1
Independent Claim
122 words
A method for fabricating an integrated circuit, the method comprising the steps of: developing a set of circuit specifications for an integrated circuit; encoding said set of circuit specifications in a hardware description language description and inputting said hardware description language description into a digital computer; providing a datapath library including datapath cells, each of said datapath cells comprising a plurality of primitive cells; synthesizing from said hardware description language description and on said computer a netlist including said datapath cells of said datapath library; resynthesizing and optimizing said netlist according to timing information describing timing characteristics of an alternative datapath cell that replaces one of said datapath cells in said netlist; fabricating an integrated circuit as specified by said resynthesized netlist.
Claim 2
Independent Claim
122 words
A method for fabricating an integrated circuit, the method comprising the steps of: developing a set of circuit specifications for an integrated circuit; encoding said set of circuit specifications in a hardware description language description and inputting said hardware description language description into a digital computer; providing a datapath library including datapath cells, each of said datapath cells comprising a plurality of primitive cells; synthesizing from said hardware description language description and on said computer a netlist including said datapath cells of said datapath library; resynthesizing and optimizing said netlist according to timing information describing timing characteristics of an alternative datapath cell that replaces one of said datapath cells in said netlist; fabricating an integrated circuit as specified by said resynthesized netlist.
Claim 3
Dependent Claim
30 words
A method as recited in claim 1 wherein said step of resynthesizing and optimizing said netlist includes retrieving said timing information for said alternative datapath cells from a timing database.
Claim 4
Dependent Claim
79 words
A method as recited in claim 2 further including a step of preprocessing a timing database, said preprocessing step comprising steps of: synthesizing from said hardware description language description a netlist including said datapath cells of said datapath library after said step of providing a datapath library; calculating timing information describing the timing characteristics each of said datapath cells used in said netlist; and storing said timing information in a timing database to be accessed in said resynthesis step.
Claim 5
Dependent Claim
33 words
A method as recited in claim 3 further comprising a step of storing an indication in a query database that timing information of a datapath cell has been stored in said timing database.
Claim 6
Dependent Claim
33 words
A method as recited in claim 4 wherein said indication includes a record having an identification of said datapath cell and a location in said timing database where said timing information is stored.
Claim 7
Dependent Claim
49 words
A method as recited in claim 4 further comprising a step of checking for match between a record in said query database and a datapath cell, wherein when match is found, said timing information for said datapath cell is not calculated and is not stored in said timing database.
Claim 8
Dependent Claim
27 words
A method as recited in claim 3 further comprising a step of compiling said netlist before said step of calculating said timing information for said datapath cells.
Claim 9
Dependent Claim
33 words
A method as recited in claim 1 wherein said step of resynthesizing and optimizing said netlist is accomplished a plurality of times in an iterative loop to optimize said netlist according to constraints.
Claim 10
Dependent Claim
40 words
A method as recited in claim 1 further comprising a step of calculating timing information describing the timing characteristics of each of said datapath cells used in said netlist and using said timing characteristics in said resynthesis and optimizing step.
Claim 11
Dependent Claim
46 words
A method as recited in claim 9 wherein said step of calculating timing characteristics for said datapath cells includes matching a datapath cell in said netlist to all available datapath cells in said datapath library and calculating timing characteristics for each of said available datapath cells.
Claim 12
Dependent Claim
47 words
A method as recited in claim 10 wherein said step of fabricating an integrated circuit comprises: producing IC mask specifications based upon said resynthesized netlist; producing a plurality of IC masks from said mask specifications; and using said plurality of IC masks to fabricate said integrated circuit.
Claim 13
Dependent Claim
22 words
A method as recited in claim 10 wherein said steps of synthesizing and resynthesizing include creating a netlist according to optimization criteria.
Claim 14
Independent Claim
115 words
An apparatus for fabricating an integrated circuit comprising: a digital processor; memory coupled to said digital processor; a datapath synthesizer for retrieving datapath operators from an input hardware description language description and synthesizing a netlist including datapath cells for implementing said datapath operators, each of said data path cells comprising a plurality of primitive cells; a datapath characterizer for providing timing characteristics of datapath cells; and a datapath resynthesizer for resynthesizing said netlist into a final netlist according to timing characteristics of alternative datapath cells that replace said datapath cells in said netlist, said timing characteristics being retrieved from said datapath characterizer, wherein said final netlist is used in said fabrication of said integrated circuit.
Claim 15
Independent Claim
115 words
An apparatus for fabricating an integrated circuit comprising: a digital processor; memory coupled to said digital processor; a datapath synthesizer for retrieving datapath operators from an input hardware description language description and synthesizing a netlist including datapath cells for implementing said datapath operators, each of said data path cells comprising a plurality of primitive cells; a datapath characterizer for providing timing characteristics of datapath cells; and a datapath resynthesizer for resynthesizing said netlist into a final netlist according to timing characteristics of alternative datapath cells that replace said datapath cells in said netlist, said timing characteristics being retrieved from said datapath characterizer, wherein said final netlist is used in said fabrication of said integrated circuit.
Claim 16
Dependent Claim
23 words
An apparatus as recited in claim 13 wherein said datapath characterizer is part of a pre-characterizer for storing timing information of datapath cells.
Claim 17
Dependent Claim
37 words
An apparatus as recited in claim 14 wherein said pre-characterizer further includes a timing database to store said timing characteristics of said alternative datapath cells, wherein said datapath characterizer retrieves said timing characteristics from said timing database.
Claim 18
Dependent Claim
34 words
An apparatus as recited in claim 14 wherein said pre-characterizer further includes a timing verifier for determining said timing characteristics of said alternative datapath cells and storing said timing characteristics in said timing database.
Claim 19
Dependent Claim
30 words
An apparatus as recited in claim 16 further comprising a netlist compiler in said pre-characterizer for compiling said datapath netlists and providing a compiled datapath netlist to said timing verifier.
Claim 20
Dependent Claim
15 words
An apparatus as recited in claim 17 wherein said netlist compiler is a datapath compiler.
Claim 21
Dependent Claim
15 words
An apparatus as recited in claim 17 wherein said netlist compiler is an architecture compiler.
Claim 22
Dependent Claim
37 words
An apparatus as recited in claim 18 further comprising a query database in said pre-characterizer for storing an indication of whether timing information for each of said alternative datapath cells has been stored in said timing database.
Claim 23
Dependent Claim
37 words
An apparatus as recited in claim 20 wherein said indication includes a record including fields for storing an identification of a datapath cell and a location of timing characteristics for said datapath cell in said timing database.
Claim 24
Dependent Claim
31 words
An apparatus as recited in claim 13 further comprising a timing verifier for receiving said netlist from said datapath synthesizer and for determining the timing characteristics of said alternative datapath cells.
Claim 25
Dependent Claim
35 words
An apparatus as recited in claim 22 wherein said datapath resynthesizer provides said alternative datapath cells one at a time to said datapath characterizer to determine said timing characteristics of said provided alternative datapath cell.
Claim 26
Dependent Claim
30 words
An apparatus as recited in claim 23 further comprising a netlist compiler for receiving said netlist from said datapath characterizer and for providing a compiled netlist to said timing verifier.
Claim 27
Dependent Claim
25 words
An apparatus as recited in claim 24 further comprising a logic optimizer for optimizing said resynthesized netlist according to user constraints including circuit delay constraints.
Claim 28
Independent Claim
100 words
A method for providing timing characteristics of datapath cells retrieved from a datapath library, the method including the steps of: providing a datapath library including datapath cells, each of said datapath cells comprising a plurality of primitive cells; developing a set of circuit specifications for an integrated circuit; encoding said set of circuit specifications in a hardware description language description; matching datapath operators in said hardware description language description to datapath cells stored in a library; determining timing characteristics of each of said matched datapath cells; and storing said timing characteristics of said matched datapath cells in a timing database.
Claim 29
Independent Claim
100 words
A method for providing timing characteristics of datapath cells retrieved from a datapath library, the method including the steps of: providing a datapath library including datapath cells, each of said datapath cells comprising a plurality of primitive cells; developing a set of circuit specifications for an integrated circuit; encoding said set of circuit specifications in a hardware description language description; matching datapath operators in said hardware description language description to datapath cells stored in a library; determining timing characteristics of each of said matched datapath cells; and storing said timing characteristics of said matched datapath cells in a timing database.
Claim 30
Dependent Claim
36 words
A method as recited in claim 26 wherein said step of determining timing characteristics is accomplished for a matched datapath cell only when said timing characteristics for said matched datapath cell have not been previously calculated.
Claim 31
Dependent Claim
34 words
A method as recited in claim 27 wherein said step of determining timing characteristics is accomplished by examining a query database to determine when timing characteristics of a datapath cell have previously been stored.
Claim 32
Dependent Claim
27 words
A method as recited in claim 28 further comprising synthesizing a netlist for each of said matched datapath cells before said step of determining said timing characteristics.
Claim 33
Dependent Claim
27 words
A method as recited in claim 29 further comprising a step of compiling said netlists of said datapath cells before said step of determining said timing characteristics.
Claim 34
Dependent Claim
35 words
A method as recited in claim 28 further comprising a step of updating said query database with an indication that timing characteristics for at least one datapath cell have been stored in said timing database.
Claim 35
Dependent Claim
37 words
A method as recited in claim 30 wherein said indication includes storing an identification of a datapath cell and the location in said timing database where said timing characteristics for said identified datapath cell can be found.
Claim 36
Dependent Claim
134 words
A computer readable medium including program instructions for fabricating an integrated circuit, the program instructions performing steps comprising: developing a set of circuit specifications for an integrated circuit; encoding said set of circuit specifications in a hardware description language description and inputting said hardware description language description into a digital computer; providing a datapath library including datapath cells, each of said datapath cells comprising a netlist of primitive cells; synthesizing from said hardware description language description and on said computer a netlist including said datapath cells of said datapath library; resynthesizing and optimizing said netlist according to timing information describing timing characteristics of an alternative datapath cell that replaces one of said datapath cells in said netlist; and providing said resynthesized netlist for fabrication of an integrated circuit as specified by said resynthesized netlist.
Claim 37
Dependent Claim
134 words
A computer readable medium including program instructions for fabricating an integrated circuit, the program instructions performing steps comprising: developing a set of circuit specifications for an integrated circuit; encoding said set of circuit specifications in a hardware description language description and inputting said hardware description language description into a digital computer; providing a datapath library including datapath cells, each of said datapath cells comprising a netlist of primitive cells; synthesizing from said hardware description language description and on said computer a netlist including said datapath cells of said datapath library; resynthesizing and optimizing said netlist according to timing information describing timing characteristics of an alternative datapath cell that replaces one of said datapath cells in said netlist; and providing said resynthesized netlist for fabrication of an integrated circuit as specified by said resynthesized netlist.
Claim 38
Dependent Claim
106 words
A computer readable medium as recited in claim 33 wherein said step of resynthesizing and optimizing said netlist includes retrieving said timing information for said alternative datapath cells from a timing database, and further including a step of preprocessing a timing database, said preprocessing step comprising steps of: synthesizing from said hardware description language description a netlist including said datapath cells of said datapath library after said step of providing a datapath library; calculating timing information describing the timing characteristics of each of said datapath cells used in said netlist; and storing said timing information in a timing database to be accessed in said resynthesis step.
Claim 39
Dependent Claim
72 words
A computer readable medium as recited in claim 34 further comprising steps of: storing an indication in a query database that timing information of a datapath cell has been stored in said timing database; and checking for match between a record in said query database and a datapath cell, wherein when match is found, said timing information for said datapath cell is not calculated and is not stored in said timing database.
Claim 40
Dependent Claim
79 words
A computer readable medium as recited in claim 33 further comprising a step of calculating timing information describing the timing characteristics of each of said datapath cells used in said netlist and using said timing characteristics in said resynthesis and optimizing step, wherein said calculating timing characteristics for said datapath cells includes matching a datapath cell in said netlist to all available datapath cells in said datapath library and calculating timing characteristics for each of said available datapath cells.
Claim 41
Dependent Claim
24 words
A computer readable medium as recited in claim 33 wherein said steps of synthesizing and resynthesizing include creating a netlist according to optimization criteria.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-03-09 | 2001-09-08 | 2002-03-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-03-09 | 2005-09-08 | 2006-03-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-03-09 | 2009-09-08 | 2010-03-10 | $7700.00 | Window Closed / Lapsed |