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US5841382A Expired / Lapsed US ⏱️ 0.0 years remaining

Fast testing of D/A converters

Assignee: Avago Technologies International Sales Pte Ltd
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Filing: 1997-03-19
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Granted: 1998-11-24
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Expires: 2017-03-19
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Abstract

Abstract Testing of digital-to-analog converters is accelerated by applying one or more different approaches. One approach relies on a switched capacitor, which lowers the overall capacitance of the converter during testing, thereby reducing the settling time for each code value. Another approach makes the duration of each testing step a function of the particular code value, rather than using the worst-case settling time for each testing step. Yet another approach uses a sequence of non-consecutive code values to determine whether each switch in the converter is functional. Using non-consecutive code values permits the use of partial settling times during converter testing. Each of the approaches can be used to accelerate the testing of D/A converters, whether they have linear or folded resistor strings.

Inventors

  • 👤 Robert W. Walden
  • 👤 Ramin Khoini-Poorfard
  • 👤 William E. Burchanowski

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 09:31
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/10; H03M1/1071; H03M1/109; H03M1/66; H03M1/68; H03M1/682; H03M1/685; H03M1/74; H03M1/76; H03M1/765

Claims Analysis

Total Claims: 20
Claim 1
Independent Claim 116 words
An integrated circuit having a D/A converter, comprising: (a) a plurality of resistors configured in a resistor string and adapted to receive two reference voltages; (b) a plurality of switches connected to the plurality of resistors; (c) decoder circuitry adapted to control the switches based on a code value to generate a corresponding tap voltage; (d) an output amplifier configured to generate an analog output voltage based on the tap voltage; (e) a normal-mode capacitor coupled to an input of the output amplifier to reduce power consumption during normal-mode operation of the D/A converter; and (f) a test-mode capacitor switchably coupled to the normal-mode capacitor to reduce settling time during test-mode operation of the D/A converter.
Claim 2
Dependent Claim 116 words
An integrated circuit having a D/A converter, comprising: (a) a plurality of resistors configured in a resistor string and adapted to receive two reference voltages; (b) a plurality of switches connected to the plurality of resistors; (c) decoder circuitry adapted to control the switches based on a code value to generate a corresponding tap voltage; (d) an output amplifier configured to generate an analog output voltage based on the tap voltage; (e) a normal-mode capacitor coupled to an input of the output amplifier to reduce power consumption during normal-mode operation of the D/A converter; and (f) a test-mode capacitor switchably coupled to the normal-mode capacitor to reduce settling time during test-mode operation of the D/A converter.
Claim 3
Dependent Claim 19 words
The invention of claim 1, wherein the resistor string is a folded resistor string or a linear resistor string.
Claim 4
Dependent Claim 25 words
The invention of claim 1, further comprising a switch transistor configured to control the configuration of the test-mode capacitor between test-mode operation and normal-mode operation.
Claim 5
Dependent Claim 39 words
The invention of claim 1, further comprising a power-saving transistor configured to isolate the signal stored in the normal-mode capacitor during normal-mode operation to permit powering down of the two reference voltages when the code value does not change.
Claim 6
Dependent Claim 21 words
The invention of claim 1, wherein the size of the normal-mode capacitor is greater than the size of the test-mode capacitor.
Claim 7
Dependent Claim 22 words
The invention of claim 1, wherein, during test-mode operation, the duration of each test step is a function of the code value.
Claim 8
Dependent Claim 35 words
The invention of claim 1, wherein, during test-mode operation, non-consecutive code values are used for consecutive test steps and the duration of each test step corresponds to a partial settling time for the D/A converter.
Claim 9
Dependent Claim 22 words
The invention of claim 7, wherein, during test-mode operation, the duration of each test step is a function of the code value.
Claim 10
Dependent Claim 89 words
The invention of claim 8, wherein: the resistor string is a folded resistor string or a linear resistor string; and further comprising: a switch transistor configured to control the configuration of the test-mode capacitor between test-mode operation and normal-mode operation; and a power-saving transistor configured to isolate the signal stored in the normal-mode capacitor during normal-mode operation to permit powering down of the two reference voltages when the code value does not change, wherein the size of the normal-mode capacitor is greater than the size of the test-mode capacitor.
Claim 11
Independent Claim 75 words
A method for testing a D/A converter, comprising the steps of: (a) applying a sequence of code values to the D/A converter, wherein the duration that each code value is applied to the D/A converter is a function of each code value and the duration is independent of the output signal generated by the D/A converter; and (b) measuring an analog output voltage from the D/A converter after the corresponding duration for each code value.
Claim 12
Independent Claim 75 words
A method for testing a D/A converter, comprising the steps of: (a) applying a sequence of code values to the D/A converter, wherein the duration that each code value is applied to the D/A converter is a function of each code value and the duration is independent of the output signal generated by the D/A converter; and (b) measuring an analog output voltage from the D/A converter after the corresponding duration for each code value.
Claim 13
Dependent Claim 16 words
The invention of claim 10, wherein the sequence of code values corresponds to non-consecutive code values.
Claim 14
Dependent Claim 28 words
The invention of claim 10, wherein the duration that each code value is applied to the D/A converter corresponds to a partial settling time for the D/A converter.
Claim 15
Dependent Claim 23 words
The invention of claim 10, wherein step (b) comprises the step of comparing the analog output voltage to a variable voltage threshold value.
Claim 16
Independent Claim 65 words
A method for testing a D/A converter, comprising the steps of: (a) applying a sequence of non-consecutive code values to the D/A converter, wherein the duration that each code value is applied to the D/A converter corresponds to a partial settling time for the D/A converter; and (b) measuring an analog output voltage from the D/A converter after the corresponding duration for each code value.
Claim 17
Independent Claim 65 words
A method for testing a D/A converter, comprising the steps of: (a) applying a sequence of non-consecutive code values to the D/A converter, wherein the duration that each code value is applied to the D/A converter corresponds to a partial settling time for the D/A converter; and (b) measuring an analog output voltage from the D/A converter after the corresponding duration for each code value.
Claim 18
Dependent Claim 23 words
The invention of claim 14, wherein step (b) comprises the step of comparing the analog output voltage to a variable voltage threshold value.
Claim 19
Dependent Claim 25 words
The invention of claim 14, wherein the duration that each code value is applied to the D/A converter is a function of each code value.
Claim 20
Dependent Claim 37 words
The invention of claim 14, wherein the duration that each code value is applied to the D/A converter is a function of each code value and is independent of the output signal generated by the D/A converter.

References Cited (Backward Citations)

US3349195A Cited
US3918046A Cited
US4266292A Cited
US4641246A Cited
US5162744A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-11-23 2002-05-25 2002-11-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-11-23 2006-05-25 2006-11-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-11-23 2010-05-25 2010-11-24 $7700.00 Window Closed / Lapsed

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