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US5848263A
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File conversion method and apparatus for LSI design data
Assignee: Yamaha Corp
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Filing: 1996-08-08
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Granted: 1998-12-08
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Expires: 2016-08-08
Abstract
Abstract A file conversion method for LSI design data, which converts LSI design data files described by a first format into source data of a list type structure expressed by lists of cells and nodes, and stores the source data in a memory, and converts the source data of the list type structure stored in the memory into LSI design data files described by a second format. A file conversion apparatus for LSI design data is comprised of multiple input processing portions for changing plural LSI design data files whose description formats are different from each other into source data of a common list type structure expressed by lists of cells and nodes, respectively, and for storing the source data in a memory, multiple output processing portions for changing the source data of the list type structure stored in the memory into plural LSI design data files, a format designation portion for designating an input format and an output format, and an activating portion for activating one of the input processing portions and one of the output processing portions according to the input format and the output format which are designated with the format designation portions, respectively.
Inventors
- 👤 Minoru Oshikiri
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 03:37
CPC Classifications
G; G06; G06F; G06F16/00; G06F16/10; G06F16/11; G06F16/116; G06F30/00
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
140 words
A method for converting an LSI design data file in a first format into an LSI design data file in a second format, the method comprising: converting the LSI design data file in the first format into source data of a list type structure expressed by a list of cells and a list of nodes, the list of nodes representing node elements each of which is representative of a plurality of terminals at an associated node, the list of cells representing cell elements, each of which is representative of a circuit function and terminals of an associated circuit element, the terminals of the nodes being logically associated with the terminals of the circuit elements; storing the source data in a memory; and converting the source data stored in the memory into the LSI design data file in the second format.
Claim 2
Independent Claim
140 words
A method for converting an LSI design data file in a first format into an LSI design data file in a second format, the method comprising: converting the LSI design data file in the first format into source data of a list type structure expressed by a list of cells and a list of nodes, the list of nodes representing node elements each of which is representative of a plurality of terminals at an associated node, the list of cells representing cell elements, each of which is representative of a circuit function and terminals of an associated circuit element, the terminals of the nodes being logically associated with the terminals of the circuit elements; storing the source data in a memory; and converting the source data stored in the memory into the LSI design data file in the second format.
Claim 3
Dependent Claim
34 words
The method according to claim 1, wherein the step of converting the LSI design data further includes creating the list of cells and nodes with a plurality of blocks having a plurality of layers.
Claim 4
Dependent Claim
30 words
The method according to claim 2, wherein the step of converting the LSI design data further includes associating said blocks having a plurality of layers with different blocks by pointers.
Claim 5
Independent Claim
194 words
An apparatus for converting LSI design data, the apparatus comprising: a plurality of input processors for converting a plurality of first LSI design data files having distinct description formats into source data including a common list type structure expressed by a list of cells and a list of nodes, the list of nodes representing node elements each of which is representative of a plurality of terminals at an associated node, the list of cells representing cell elements each of which is representative of a circuit function and terminals of an associated circuit element, the terminals of the nodes being logically associated with the terminals of the circuit elements; a memory coupled to the input processors for storing the source data; a plurality of output processors for converting the source data stored in the memory to a plurality of second LSI design data files whose description formats are different from each other; a format designation means for designating an output format; and an activating means for activating one of the input processors and one of the output processors according to the input format and the output format which are designated with the format designation means.
Claim 6
Independent Claim
194 words
An apparatus for converting LSI design data, the apparatus comprising: a plurality of input processors for converting a plurality of first LSI design data files having distinct description formats into source data including a common list type structure expressed by a list of cells and a list of nodes, the list of nodes representing node elements each of which is representative of a plurality of terminals at an associated node, the list of cells representing cell elements each of which is representative of a circuit function and terminals of an associated circuit element, the terminals of the nodes being logically associated with the terminals of the circuit elements; a memory coupled to the input processors for storing the source data; a plurality of output processors for converting the source data stored in the memory to a plurality of second LSI design data files whose description formats are different from each other; a format designation means for designating an output format; and an activating means for activating one of the input processors and one of the output processors according to the input format and the output format which are designated with the format designation means.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-12-07 | 2002-06-08 | 2002-12-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-12-07 | 2006-06-08 | 2006-12-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-12-07 | 2010-06-08 | 2010-12-08 | $7700.00 | Window Closed / Lapsed |