Patent US5859669A successfully refreshed from Google Patents.
US5859669A
Expired / Lapsed
US
⏱️ 0.0 years remaining
System for encoding an image control signal onto a pixel clock signal
Assignee: Texas Instruments Inc
•
Filing: 1996-11-26
•
Granted: 1999-01-12
•
Expires: 2016-11-26
Abstract
Abstract A system for encoding control data onto a clock signal includes at least one clock cycle in the clock signal; a first transition in the at least one clock cycle, the first transition is from a first voltage level to a second voltage level, the first transition is in a first location in the at least one clock cycle; a second transition in the at least one clock cycle, the second transition is from the second voltage level to the first voltage level, the second transition has a variable location in the clock cycle; and an encoder circuit for positioning the second transition in the variable location in response to the control data.
Inventors
- 👤 Richard Mark Prentice
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 19:26
CPC Classifications
G; G09; G09G; G09G5/00; G09G5/003; G09G5/006; G09G5/18
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
121 words
A system for encoding control data onto a clock signal comprising: at least one clock cycle in the clock signal; a first transition in the at least one clock cycle, the first transition is from a first voltage level to a second voltage level, the first transition is in a first location in the at least one clock cycle; a second transition in the at least one clock cycle, the second transition is from the second voltage level to the first voltage level, the second transition has a variable location in the clock cycle; and an encoder circuit for positioning the second transition in the variable location in response to the control data; wherein the control data comprises three control bits.
Claim 2
Independent Claim
121 words
A system for encoding control data onto a clock signal comprising: at least one clock cycle in the clock signal; a first transition in the at least one clock cycle, the first transition is from a first voltage level to a second voltage level, the first transition is in a first location in the at least one clock cycle; a second transition in the at least one clock cycle, the second transition is from the second voltage level to the first voltage level, the second transition has a variable location in the clock cycle; and an encoder circuit for positioning the second transition in the variable location in response to the control data; wherein the control data comprises three control bits.
Claim 3
Dependent Claim
14 words
The system of claim 1 wherein the three control bits have five valid combinations.
Claim 4
Dependent Claim
15 words
The system of claim 2 wherein the variable location is one of five discrete locations.
Claim 5
Dependent Claim
23 words
The system of claim 3 wherein each of the five valid combinations are encoded onto a corresponding one of the five discrete locations.
Claim 6
Independent Claim
79 words
A device for transmitting video signals comprising: video signal bits having parallel image data bits and at least one control bit; at least one image serializer for converting the parallel image data bits to serial data; an encoder circuit for converting the at least one control bit to parallel clock encoding data; a control signal serializer for providing an encoded clock signal; and a clock signal for clocking the at least one image serializer and the control signal serializer.
Claim 7
Independent Claim
79 words
A device for transmitting video signals comprising: video signal bits having parallel image data bits and at least one control bit; at least one image serializer for converting the parallel image data bits to serial data; an encoder circuit for converting the at least one control bit to parallel clock encoding data; a control signal serializer for providing an encoded clock signal; and a clock signal for clocking the at least one image serializer and the control signal serializer.
Claim 8
Dependent Claim
24 words
The device of claim 5 further comprising at least one differential driver for receiving corresponding serial data from the at least one image serializer.
Claim 9
Dependent Claim
26 words
The device of claim 5 further comprising at least one latch for coupling the parallel image data bits to a corresponding at least one image serializer.
Claim 10
Dependent Claim
16 words
The device of claim 5 further comprising a differential driver for receiving the encoded clock signal.
Claim 11
Dependent Claim
16 words
The device of claim 5 further comprising a phase locked loop for providing the clock signal.
Claim 12
Dependent Claim
17 words
The device of claim 5 wherein the image serializers convert six parallel image bits to serial data.
Claim 13
Independent Claim
65 words
A method for transferring video signals comprising: encoding control data onto a clock signal to provide an encoded clock signal; converting parallel video data to serial data; transferring the serial data and the encoded clock signal through differential lines; converting the serial data on the differential lines to parallel data; and decoding the encoded clock signal to obtain the control data and the clock signal.
Claim 14
Independent Claim
65 words
A method for transferring video signals comprising: encoding control data onto a clock signal to provide an encoded clock signal; converting parallel video data to serial data; transferring the serial data and the encoded clock signal through differential lines; converting the serial data on the differential lines to parallel data; and decoding the encoded clock signal to obtain the control data and the clock signal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-01-11 | 2002-07-13 | 2003-01-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-01-11 | 2006-07-13 | 2007-01-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-01-11 | 2010-07-13 | 2011-01-12 | $7700.00 | Window Closed / Lapsed |