US6034403A
Expired / Lapsed
US
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High density flat cell mask ROM
Assignee: Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Filing: 1998-06-25
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Granted: 2000-03-07
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Expires: 2018-06-25
Abstract
Abstract A high-density flat cell mask ROM is disclosed. The mask ROM comprises: a semiconductor substrate having a plurality of trenches and each of the trenches is separated to keep a space with each other. A plurality of oxynitride layers is formed on all sidewall and bottom surfaces of those trenches. A plurality of n+-doped polysilicon layers is formed on the oxynitride layers. A n+ doped silicon layer serves as buried bit line formed in the semiconductor substrate and surrounding the trenches. Each of the doped silicon layers is spaced from the n+-doped polysilicon layers by the oxynitride layer. A plurality of thick oxide layers is formed on the n+ polysilicon layers. A plurality of thin oxide layers are formed on the semiconductor substrate and between those thick oxide layer, and each of thin oxide layers is contiguous with the thick oxide layers. A coding region is formed in the semiconductor substrate and abutting one of those thin oxide layers, and another n+-doped polysilicon layer formed on upper surfaces of those thick oxide layers, and those thin oxide layers.
Inventors
- 👤 Shye-Lin Wu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 03:26
CPC Classifications
H; H10; H10B; H10B20/00; H10B20/27; H10B20/30; H10B20/38; H10B20/383
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
167 words
A mask ROM device structure comprising: a semiconductor substrate having a plurality of trenches, each of said trenches being separated to keep a space with each other; a plurality of oxynitride layers formed on all sidewall and bottom surfaces of said plurality of trenches; a plurality of first conductive layers formed on said oxynitride layers; a plurality of second conductive layers formed in said semiconductor substrate and surrounding said plurality of trenches, each of said second conductive layers spaced from said first conductive layers by said oxynitride layer; a plurality of first isolations formed on said plurality of first conductive layers; a plurality of second isolations formed on said semiconductor substrate and between said plurality of first isolations, each of second isolations be contiguous with each of said first isolations; a coding region formed in said semiconductor substrate and abutting one of said plurality of second isolations; and a third conductive layer formed on upper surfaces of said plurality of first isolations, said plurality of second isolations.
Claim 2
Dependent Claim
167 words
A mask ROM device structure comprising: a semiconductor substrate having a plurality of trenches, each of said trenches being separated to keep a space with each other; a plurality of oxynitride layers formed on all sidewall and bottom surfaces of said plurality of trenches; a plurality of first conductive layers formed on said oxynitride layers; a plurality of second conductive layers formed in said semiconductor substrate and surrounding said plurality of trenches, each of said second conductive layers spaced from said first conductive layers by said oxynitride layer; a plurality of first isolations formed on said plurality of first conductive layers; a plurality of second isolations formed on said semiconductor substrate and between said plurality of first isolations, each of second isolations be contiguous with each of said first isolations; a coding region formed in said semiconductor substrate and abutting one of said plurality of second isolations; and a third conductive layer formed on upper surfaces of said plurality of first isolations, said plurality of second isolations.
Claim 3
Dependent Claim
16 words
The mask ROM of claim 1, wherein said trenches have a depth of about 50-500 nm.
Claim 4
Dependent Claim
38 words
The mask ROM of claim 1, wherein said oxynitride layer is formed to a thickness of about 1-5 nm at a temperature about 750-1150° C. in an ambient selected from the group comprising N 2 O and NO.
Claim 5
Dependent Claim
19 words
The mask ROM of claim 1, wherein said first conductivity layer is n+ conductivity type impurities doped polysilicon layer.
Claim 6
Dependent Claim
19 words
The mask ROM of claim 1, wherein said second conductivity layer is n+ conductivity type impurities containing silicon layer.
Claim 7
Dependent Claim
28 words
The mask ROM of claim 1, wherein said first isolation layer is an oxide layer grown at a temperature about 750-1100° C. to thickness of about 15-50 nm.
Claim 8
Dependent Claim
28 words
The mask ROM of claim 1, wherein said second isolation layer is a oxide layer grown at a temperature about 750-1100° C. to thickness of about 5-15 nm.
Claim 9
Dependent Claim
44 words
The mask ROM device of claim 1, wherein said coding region is formed by a species of p-type ion implantation with an energy and a dosage of about 10 to 80 keV and of about 5×10 12 to 5×10 14 /cm 2 , respectively.
Claim 10
Dependent Claim
25 words
The mask ROM device of claim 8 wherein said species p-type ions is selected from a group consisting of BF 2 + and boron ions.
Claim 11
Dependent Claim
31 words
The mask ROM of claim 1, wherein said third conductivity layer is n+ conductivity type impurities doped polysilicon layer, the doping concentration is about 5×10 19 -5×10 21 /cm 3 .
Claim 12
Dependent Claim
22 words
The mask ROM of claim 4, wherein said n+ conductivity type impurities is selected from a group consisting phosphorus and arsenic ions.
Claim 13
Dependent Claim
22 words
The mask ROM of claim 5, wherein said n+ conductivity type impurities is selected from a group consisting phosphorus and arsenic ions.
Claim 14
Dependent Claim
22 words
The mask ROM of claim 10, wherein said n+ conductivity type impurities is selected from a group consisting phosphorus and arsenic ions.
References Cited (Backward Citations)
US5517047A
Cited
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2003-03-07 | 2003-09-06 | 2004-03-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-03-07 | 2007-09-06 | 2008-03-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-03-07 | 2011-09-06 | 2012-03-07 | $7700.00 | Window Closed / Lapsed |