Memory cell incorporating a chalcogenide element and method of making same
Abstract
Abstract A memory cell incorporating a chalcogenide element and a method of making same is disclosed. In the method, a doped silicon substrate is provided with two or more polysilicon plugs to form an array of diode memory cells. A layer of silicon nitride is disposed over the plugs. Using a poly-spacer process, small pores are formed in the silicon nitride to expose a portion of the polysilicon plugs. A chalcogenide material is disposed in the pores by depositing a layer of chalcogenide material on the silicon nitride layer and planarizing the chalcogenide layer to the silicon nitride layer using CMP. A layer of TiN is next deposited over the plugs, followed by a metallization layer. The TiN and metallization layers are then masked and etched to define memory cell areas.
Inventors
- 👤 Graham R. Wolstenholme
- 👤 Fernando Gonzalez
- 👤 Russell C. Zahorik
Bibliographic Details
Claims Analysis
Total Claims: 8References Cited (Backward Citations)
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