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US6503829B2 Expired / Lapsed US ⏱️ 0.0 years remaining

Metal via contact of a semiconductor device and method for fabricating the same

Assignee: Samsung Electronics Co Ltd
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Filing: 2001-03-21
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Granted: 2003-01-07
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Expires: 2021-03-21
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Abstract

Abstract A metal via contact of a semiconductor device and a method for fabricating the same, wherein the method includes sequentially forming a first insulating layer, a low dielectric SOG (Spin On Glass) layer, a second insulating layer and a silicon oxynitride (SiON) layer on a semiconductor substrate forming a photoresist pattern, using the photoresist pattern as an etching mask and wet etching the silicon oxynitride layer and a portion of the second insulating layer, using the same photoresist pattern as an etching mask and anisotropically etching remainder second insulating layer, the low dielectric SOG layer and the first insulating layer to form a via hole exposing a predetermined portion of the semiconductor substrate, removing the photoresist pattern, using radio frequency (RF) etching to remove a reverse slope of the via hole and forming a metal plug in the via hole.

Inventors

  • 👤 Won-Jin Kim
  • 👤 Seong-Ho Kim

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 21:28
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/011; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/081; H10W20/082; H10P; H10P50/00; H10P50/20; H10P50/28; H10P50/282; H10P50/283

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 135 words
A method for fabricating a semiconductor device, the method comprising: sequentially forming a first insulating layer, a low dielectric SOG (Spin On Glass) layer, a second insulating layer and a silicon oxynitride (SiON) layer on a semiconductor substrate; forming a photoresist pattern; using the photoresist pattern as an etching mask and wet etching the silicon oxynitride layer and a portion of the second insulating layer; using the same photoresist pattern as an etching mask and anisotropically etching a remaining portion of the second insulating layer, the low dielectric SOG layer and the first insulating layer to form a via hole exposing a predetermined portion of the semiconductor substrate; removing the photoresist pattern; using radio frequency (RF) etching to remove a reverse slope of the via hole; and forming a metal plug in the via hole.
Claim 2
Independent Claim 135 words
A method for fabricating a semiconductor device, the method comprising: sequentially forming a first insulating layer, a low dielectric SOG (Spin On Glass) layer, a second insulating layer and a silicon oxynitride (SiON) layer on a semiconductor substrate; forming a photoresist pattern; using the photoresist pattern as an etching mask and wet etching the silicon oxynitride layer and a portion of the second insulating layer; using the same photoresist pattern as an etching mask and anisotropically etching a remaining portion of the second insulating layer, the low dielectric SOG layer and the first insulating layer to form a via hole exposing a predetermined portion of the semiconductor substrate; removing the photoresist pattern; using radio frequency (RF) etching to remove a reverse slope of the via hole; and forming a metal plug in the via hole.
Claim 3
Dependent Claim 32 words
The method according to claim 1 , wherein removing the photoresist pattern is carried out by a process selected from the group consisting of ashing and a combination of ashing and stripping.
Claim 4
Dependent Claim 21 words
The method according to claim 1 , wherein radio frequency (RF) etching continues until the silicon oxynitride layer is completely removed.
Claim 5
Dependent Claim 18 words
The method according to claim 1 , wherein forming the metal plug comprises sputtering and heat reflow techniques.
Claim 6
Dependent Claim 17 words
The method according to claim 4 , wherein the sputtering technique uses aluminium as a sputtering source.
Claim 7
Dependent Claim 37 words
The method according to claim 4 , wherein radio frequency (RF) etching is carried out in a sputtering apparatus for the metal plug, thereby providing an in-situ process for the radio frequency etching and the metal plug.
Claim 8
Dependent Claim 31 words
The method according to claim 1 , wherein radio frequency (RF) etching is carried out so as not to enlarge a top width of the via hole beyond an undercut portion.

References Cited (Backward Citations)

US5895937A Cited
KR970026317A Cited
KR980000967A Cited
US5968851A Cited
US6191031B1 Cited
US6335275B1 Cited
US6200906B1 Cited
US6258729B1 Cited
US6385842B1 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2006-01-06 2006-07-08 2007-01-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2010-01-06 2010-07-08 2011-01-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2014-01-06 2014-07-08 2015-01-07 $7700.00 Window Closed / Lapsed

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