Abstract A silicon nitride read only memory and associated method of data programming and erasing. The read only memory includes a first type ion-doped semiconductor substrate, an oxide-nitride-oxide (ONO) composite layer over the semiconductor substrate, a first type ion-doped gate conductive layer over the ONO layer and a second type ion doped source/drain region in the substrate on each side of the ONO layer, wherein the second type ions have an electrical polarity opposite to the first type ions. Data is programmed into the silicon nitride read only memory by channel hot electron injection and data is erased from the silicon nitride read only memory by negative gate channel erase method. Since the gate conductive layer and the channel layer are identically doped, the energy gap between the two layers reduced. Hence, operating voltage of the gate terminal is lowered and damage to the tunnel oxide layer by hot holes is reduced.
Inventors
👤 Chia-Hsing Chen
👤 Ming-Hung Chou
👤 Jiunn-Ren Hwang
👤 Cheng-Jye Liu
Bibliographic Details
Application Number—
JurisdictionUS
Data Sourcegoogle_patents
Last Synchronized2026-10-27 01:57
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/69
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
68 words
A silicon nitride read only memory, comprising: a first type ion doped semiconductor substrate; an oxide-nitride-oxide (ONO) composite layer over the semiconductor substrate; a first type ion doped gate conductive layer over the ONO layer; and a second type ion doped source/drain region in the semiconductor substrate on each side of the ONO layer; wherein the second type ions have a polarity opposite to the first type ions.
Claim 2
Dependent Claim
68 words
A silicon nitride read only memory, comprising: a first type ion doped semiconductor substrate; an oxide-nitride-oxide (ONO) composite layer over the semiconductor substrate; a first type ion doped gate conductive layer over the ONO layer; and a second type ion doped source/drain region in the semiconductor substrate on each side of the ONO layer; wherein the second type ions have a polarity opposite to the first type ions.
Claim 3
Dependent Claim
14 words
The memory of claim 1 , wherein the first type ion includes P-type ions.
Claim 4
Dependent Claim
14 words
The memory of claim 1 , wherein the second type ions include N-type ions.
Claim 5
Dependent Claim
45 words
A method of programming data into and erasing data from a silicon nitride read only memory according to claim 1 , the method comprising: programming data into the memory by channel hot electron injection; and erasing data from the memory by negative gate channel erasing.
Claim 6
Dependent Claim
14 words
The method of claim 4 , wherein the first type ions include P-type ions.
Claim 7
Dependent Claim
14 words
The method of claim 4 , wherein the second type ions include N-type ions.