Patent US4663191A successfully refreshed from Google Patents.
US4663191A
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Salicide process for forming low sheet resistance doped silicon junctions
Assignee: International Business Machines Corp
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Filing: 1985-10-25
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Granted: 1987-05-05
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Expires: 2005-10-25
Abstract
Abstract A process of forming a patterned silicide layer overlying a processed semiconductor substrate, the substrate having insulator regions and insulator-free regions on an exposed surface thereof, comprising the steps of: co-depositing silicon and a refractory metal on the exposed surface of the substrate to form a metal rich silicide thereon; annealing the metal rich silicide such that it reacts with the underlying insulator-free regions to form a reacted silicide without reacting with the underlying insulator regions; and exposing the substrate to a wet etchant which removes the unreacted portions of the metal rich silicide without removing the reacted silicide.
Inventors
- 👤 Kwangwoo Choi
- 👤 Stanley Roberts
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 02:53
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0112; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01306; H10D64/01308; H10D64/0131; H10P; H10P50/00; H10P50/60; H10P50/66; H10P50/663; H10P50/667
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
108 words
A process of forming a patterned silicide layer overlying a processed semiconductor substrate, the substrate having insulator regions and insulator-free regions on an exposed surface thereof, comprising the steps of: co-depositing silicon and a refractory metal on the exposed surface of the substrate to form a metal rich silicide of the formula MSi x thereon, wherein 0.25≦x≦1.0; annealing the metal rich silicide such that it reacts with the underlying insulator-free regions to form a reacted silicide without reacting with the underlying insulator regions; and exposing the substrate to a concentrated basic peroxide etchant which removes the unreacted portions of said metal rich silicide without removing said reacted silicide.
Claim 2
Dependent Claim
108 words
A process of forming a patterned silicide layer overlying a processed semiconductor substrate, the substrate having insulator regions and insulator-free regions on an exposed surface thereof, comprising the steps of: co-depositing silicon and a refractory metal on the exposed surface of the substrate to form a metal rich silicide of the formula MSi x thereon, wherein 0.25≦x≦1.0; annealing the metal rich silicide such that it reacts with the underlying insulator-free regions to form a reacted silicide without reacting with the underlying insulator regions; and exposing the substrate to a concentrated basic peroxide etchant which removes the unreacted portions of said metal rich silicide without removing said reacted silicide.
Claim 3
Dependent Claim
21 words
The process of claim 1, wherein said refractory metal is selected from the group consisting of titanium, zirconium, tungsten and molybdenum.
Claim 4
Dependent Claim
11 words
The process of claim 1, wherein said refractory metal is titanium.
Claim 5
Dependent Claim
22 words
The process of claim 1, wherein said insulator-free regions comprise monocrystalline or polycrystalline silicon, and wherein said insulator regions comprise silicon dioxide.
Claim 6
Dependent Claim
17 words
The process of claim 1, wherein said etchant has a pH of about 11 to about 12.
Claim 7
Dependent Claim
22 words
The process of claim 1, wherein said etchant consists essentially of a 1:1:1 volume solution of ammonium hydroxide, hydrogen peroxide and water.
Claim 8
Dependent Claim
107 words
A process of forming a patterned silicide layer overlying a processed semiconductor substrate, the substrate having insulator regions and insulator-free regions on an exposed surface thereof, comprising the steps of: co-depositing silicon and a refractory metal on the exposed surface of the substrate to form a metal rich silicide of the formula MSi x thereon, 0.25≦x≦0.75; annealing the metal rich silicide such that it reacts with the underlying insulator-free regions to form a reacted silicide without reacting with the underlying insulator regions; and exposing the substrate to a concentrated acidic peroxide etchant which removes the unreacted portions of said metal rich silicide without removing said reacted silicide.
Claim 9
Dependent Claim
107 words
A process of forming a patterned silicide layer overlying a processed semiconductor substrate, the substrate having insulator regions and insulator-free regions on an exposed surface thereof, comprising the steps of: co-depositing silicon and a refractory metal on the exposed surface of the substrate to form a metal rich silicide of the formula MSi x thereon, 0.25≦x≦0.75; annealing the metal rich silicide such that it reacts with the underlying insulator-free regions to form a reacted silicide without reacting with the underlying insulator regions; and exposing the substrate to a concentrated acidic peroxide etchant which removes the unreacted portions of said metal rich silicide without removing said reacted silicide.
Claim 10
Dependent Claim
20 words
The process of claim 7, wherein said refractory metal is selected from the group consisting of cobalt, vanadium and nickel.
Claim 11
Dependent Claim
22 words
The process of claim 7, wherein said insulator-free regions comprise monocrystalline or polycrystalline silicon, and wherein said insulator regions comprise silicon dioxide.
Claim 12
Dependent Claim
17 words
The process of claim 7, wherein said etchant has a pH of about 1 to about 2.
Claim 13
Dependent Claim
36 words
The process of claim 2, wherein said etchant consists essentially of a 1:1:1 volume solution of a member selected from the group consisting of hydrochloric acid and sulfuric acid, in combination with hydrogen peroxide and water.
References Cited (Backward Citations)
US4180596A
Cited
US4332839A
Cited
US4337476A
Cited
US4389257A
Cited
US4470189A
Cited
US4563805A
Cited
US4567058A
Cited
US4609568A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1990-05-04 | 1990-11-03 | 1991-05-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-05-04 | 1994-11-03 | 1995-05-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-05-04 | 1998-11-03 | 1999-05-05 | $7700.00 | Window Closed / Lapsed |