Read-only memory

Claim 1

A read-only memory comprising a plurality of insulated gate field effect transistors, a plurality of word lines, a plurality of data lines, and a plurality of memory cells disposed at respective intersections of the word lines and the data lines, wherein: said word lines are formed straight on a semiconductor substrate and operate as gate electrodes of said insulated gate field effect transistors formed in said memory cells; first conductive lines are provided over said word lines through an insulator and are electrically connected to said word lines at least at two points; first impurity regions are provided in said semiconductor substrate and operate as one of a drain or source of said insulated gate field effect transistors, said first impurity regions being formed in parallel with said word lines; second impurity regions are provided in said semiconductor substrate and operate as the other of said source or drain of said insulated gate field effect transistors; second conductive lines are connected to said first impurity regions; and third conductive lines are connected to said second impurity regions; and further wherein: said second conductive lines operate as ground lines and are arranged so that each of said first impurity regions is coupled to one of said ground lines through a contact hole in an insulator formed over each of said first impurity region; said third conductive lines operates as data lines; and information is read out from said cells selected by said word lines and said data lines.