Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
210 words
A process for forming isolation regions on a semiconductor substrate, which comprises: a. anisotropically etching a laminate comprising (i) a silicon semiconductor substrate having thereon a silicon dioxide stress release layer, (ii) a polysilicon layer on said stress release layer, (iii) a first silicon nitride layer on said polysilicon layer, and (iv) a photo-resist masking active regions, so as to remove from said laminate the unmasked first layer of silicon nitride and the unmasked polysilicon layer completely; b. isotropically etching the resultant structure to partially undercut the vertical portions of the polysilicon under the first silicon nitride layer so as to form an overhang of said first silicon nitride layer over said polysilicon layer; c. stripping the photo-resist mask; d. etching the stress release layer to completely remove the portion thereof not covered by the polysilicon layer; e. depositing a second silicon nitride layer over the surface of the resulting structure; f. anisotropically etching the second layer of silicon nitride to completely remove the portion thereof not covered by the overhang and expose the surface of the semiconductor substrate; g. oxidizing the exposed semiconductor substrate so as to form a field oxide region; and h. removing the residual first and second layers of silicon nitride, polysilicon, and stress release layers.
Claim 2
Dependent Claim
210 words
A process for forming isolation regions on a semiconductor substrate, which comprises: a. anisotropically etching a laminate comprising (i) a silicon semiconductor substrate having thereon a silicon dioxide stress release layer, (ii) a polysilicon layer on said stress release layer, (iii) a first silicon nitride layer on said polysilicon layer, and (iv) a photo-resist masking active regions, so as to remove from said laminate the unmasked first layer of silicon nitride and the unmasked polysilicon layer completely; b. isotropically etching the resultant structure to partially undercut the vertical portions of the polysilicon under the first silicon nitride layer so as to form an overhang of said first silicon nitride layer over said polysilicon layer; c. stripping the photo-resist mask; d. etching the stress release layer to completely remove the portion thereof not covered by the polysilicon layer; e. depositing a second silicon nitride layer over the surface of the resulting structure; f. anisotropically etching the second layer of silicon nitride to completely remove the portion thereof not covered by the overhang and expose the surface of the semiconductor substrate; g. oxidizing the exposed semiconductor substrate so as to form a field oxide region; and h. removing the residual first and second layers of silicon nitride, polysilicon, and stress release layers.
Claim 3
Dependent Claim
17 words
The process of claim 1 wherein, after step f, the exposed semiconductor substrate is subject to ion-implantation.
Claim 4
Dependent Claim
42 words
The process of claim 1 wherein, after step f, a photo-resist layer is formed atop the substrate to define a p - field mask, the exposed semiconductor substrate is subject to an ion-implatation step, and the p - field mask is stripped.
Claim 5
Dependent Claim
17 words
The process of claim 1, 2 or 3 where the stress release layer is a pad oxide.
Claim 6
Dependent Claim
14 words
The process of claim 1 wherein the semiconductor substrate is an n-type silicon wafer.
Claim 7
Dependent Claim
17 words
The process of claim 1 whrein the process is used to define isolation regions of a PMOS.
Claim 8
Dependent Claim
15 words
The process of claim 1, 2 or 3 wherein the anisotropic etching is reactive-ion etching.
Claim 9
Dependent Claim
15 words
The process of claim 1, 2 or 3 wherein the isotropic etching is plasma etching.
Claim 10
Dependent Claim
28 words
The process of claim 1, 2 or 3 wherein the etching in step d is either with a buffered oxide etchant or with a diluted hydrogen fluoride solution.
Claim 11
Dependent Claim
25 words
The process of claim 1, 2 or 3 wherein the first and second silicon nitride layers are either LPCVD silicon nitride or PECVD silicon nitride.
Claim 12
Dependent Claim
14 words
The process of claim 2 wherein the semiconductor substrate is a p-type silicon wafer.
Claim 13
Dependent Claim
17 words
The process of claim 2 wherein the process is used to define isolation regions of an NMOS.
Claim 14
Dependent Claim
18 words
The process of claim 3 wherein the semiconductor substrate is either an n-type or a p-type silicon wafer.
Claim 15
Dependent Claim
17 words
The process of claim 3 wherein the process is used to define isolation regions of a CMOS.