FET reference voltage generator which is impervious to input voltage fluctuations

Claim 3

The device according to claim 1, wherein each of said field effect transistors of said third transistor means has a gate electrode and a drain electrode connected to said gate electrode.

Claim 4

The device according to claim 2, wherein further comprising: resistor means connected to said first transistor means, for discharging charge carriers accumulated in the gate of said first transistor means.

Claim 5

The device according to claim 3, wherein said field effect transistor of said resistor means has a source electrode connected to the gate electrode of said first transistor means, and a drain electrode and a gate electrode which are connected to each other.

Claim 6

The device according to claim 4, wherein said second transistor means comprises a field effect transistor having a source electrode connected to the drain electrode of said first transistor means, and a drain electrode and a gate electrode which are connected to each other.

Claim 7

The device according to claim 5, wherein said field effect transistors of said first, second and third transistor means and said resistor means have the same channel conductivity type.

Claim 8

The device according to claim 1, wherein said third transistor means generates said potential drop as a gate-source voltage for said first transistor means, and biases said first transistor means such that it operates in a certain operation region of a current-voltage characteristic of pentodes.

Claim 9

A reference voltage generating circuit used in a semiconductor integrated circuit device, comprising: a first field effect transistor serving as a constant current source which receives a power supply voltage to produce a d.c. current, said first transistor having a source electrode and a gate electrode; a second field effect transistor connected in series to said first transistor, for serving as a resistor element which receives the d.c. current to generate a d.c. voltage as the reference voltage; and a predetermined number n (n≧2) of field effect transistors connected between said source and gate of said first transistor, for stabilizing the reference voltage by causing the d.c. current flowing in said first transistor to be kept constant irrespective of change in the power supply voltage, said transistors being series-connected field effect transistors which are connected directly between said source and gate electrodes of said first transistor, each having a threshold voltage drop Vth across the source and drain of each of said series connected transistor, said series connected field effect transistors generating a potential drop nVth which is applied between said source and gate electrodes of said first transistor to cause a gate-source voltage thereof to remain constant, whereby the d.c. current flowing in said first transistor is kept constant even when said power supply voltage is varied.

Claim 10

A reference voltage generating circuit used in a semiconductor integrated circuit device, comprising: a first field effect transistor serving as a constant current source which receives a power supply voltage to produce a d.c. current, said first transistor having a source electrode and a gate electrode; a second field effect transistor connected in series to said first transistor, for serving as a resistor element which receives the d.c. current to generate a d.c. voltage as the reference voltage; and a predetermined number n (n≧2) of field effect transistors connected between said source and gate of said first transistor, for stabilizing the reference voltage by causing the d.c. current flowing in said first transistor to be kept constant irrespective of change in the power supply voltage, said transistors being series-connected field effect transistors which are connected directly between said source and gate electrodes of said first transistor, each having a threshold voltage drop Vth across the source and drain of each of said series connected transistor, said series connected field effect transistors generating a potential drop nVth which is applied between said source and gate electrodes of said first transistor to cause a gate-source voltage thereof to remain constant, whereby the d.c. current flowing in said first transistor is kept constant even when said power supply voltage is varied.

Claim 11

The circuit according to claim 8, wherein said first to fourth transistors comprise metal oxide semiconductor field effect transistors of one channel conductivity type, each of which has a threshold voltage level which is substantially the same as those of the remaining transistors.

Claim 12

The circuit according to claim 9, further comprising: a fifth field effect transistor having a source electrode connected to the gate electrode of said first transistor, for serving as a second resistor element for discharging charge carriers accumulated in said gate of said first transistor.

Claim 13

The circuit according to claim 10, wherein each of said first to fifth transistors has a drain electrode connected to the gate electrode thereof.