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Method of fabricating self aligned semiconductor devices
Assignee: Fairchild Semiconductor Corp
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Filing: 1988-07-14
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Granted: 1989-11-28
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Expires: 2008-07-14
Abstract
Abstract A self aligned method of fabricating a self aligned semiconductor device employs an initial step in which a first window having an inner perimeter and outer perimeter is opened through a first protective layer situated atop a semiconductor substrate, to divide the substrate into three separate zones. The window exposes a first surface portion of the semiconductor substrate and circumferentially defines or encompasses a second central portion of the protective layer as well as a second unexposed surface portion of the substrate. A third surface portion of the substrate lies beyond the outer perimeter of the first window. Precisely aligned substrate regions of the same or different conductivity type can be established by using differentially etchable materials to mask designated surface portions of the substrate.
Inventors
- 👤 Peter V. Gray
- 👤 Bantval J. Baliga
- 👤 Mike F. S. Chang
- 👤 George C. Pifer
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 22:38
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/028; H10D30/0291; H10D12/00; H10D12/01; H10D12/031; H10D12/032; H10D84/00; H10D84/01; H10D84/0102; H10D84/0105; H10P; H10P76/00; H10P76/40
Claims Analysis
Total Claims: 67
Claim 1
Independent Claim
215 words
A method of fabricating a self aligned semiconductor device comprising the steps of: (a) providing a semiconductor substrate having a major surface; (b) providing a first protective layer atop said substrate surface; (c) opening a first window through a first portion of said protective layer, said first window having an inner perimeter and an outer perimeter and encompassing a second portion of said first protective layer (d) introducing a first dopant into said substrate through said first window to establish a first doped region, said first doped region being self aligned with respect to said first window; (e) forming a second protective layer over said substrate in said first window; (f) opening a second window by removing said second portion of said first protective layer; (g) introducing a second dopant into said substrate through said second window to establish a second doped region, said second doped region being self aligned with respect to said inner perimeter of said first window; (h) opening a third window through said second protective layer to expose a portion of said first doped region; and (i) introducing a third dopant through said third window into said first region to establish a third region, said third doped region being self aligned with respect to the outer perimeter of said first window.
Claim 2
Independent Claim
215 words
A method of fabricating a self aligned semiconductor device comprising the steps of: (a) providing a semiconductor substrate having a major surface; (b) providing a first protective layer atop said substrate surface; (c) opening a first window through a first portion of said protective layer, said first window having an inner perimeter and an outer perimeter and encompassing a second portion of said first protective layer (d) introducing a first dopant into said substrate through said first window to establish a first doped region, said first doped region being self aligned with respect to said first window; (e) forming a second protective layer over said substrate in said first window; (f) opening a second window by removing said second portion of said first protective layer; (g) introducing a second dopant into said substrate through said second window to establish a second doped region, said second doped region being self aligned with respect to said inner perimeter of said first window; (h) opening a third window through said second protective layer to expose a portion of said first doped region; and (i) introducing a third dopant through said third window into said first region to establish a third region, said third doped region being self aligned with respect to the outer perimeter of said first window.
Claim 3
Dependent Claim
34 words
The method of fabricating a semiconductor device of claim 1 wherein said second and third regions are of one opposite type conductivity and said substrate and said first region are of opposite type conductivity.
Claim 4
Dependent Claim
25 words
The method of fabricating a semiconductor device of claim 1 wherein said first, second and third protective layers are substantially impermeable to diffusion dopant penetration.
Claim 5
Dependent Claim
24 words
The method of fabricating a semiconductor device of claim 1 wherein said first, second and third protective layers are substantially impermeable implantation dopant penetration.
Claim 6
Dependent Claim
28 words
The method of fabricating a semiconductor device of claim 1 wherein said third region extends beyond said outer perimeter of said first window beneath said first protective layer.
Claim 7
Dependent Claim
31 words
The method of fabricating a semiconductor device of claim 1 further comprising the step of providing a metallization layer in ohmic contact with a portion of said first and second regions.
Claim 8
Dependent Claim
20 words
The method of fabricating a semiconductor device of claim 1 wherein said first protective layer comprises an insulated gate electrode.
Claim 9
Dependent Claim
44 words
The method of fabricating a semiconductor device of claim 1 wherein said first protective layer comprises an a first insulating layer disposed atop said substrate, a gate electrode disposed atop said first insulating layer and a second insulating layer disposed atop said gate electrode.
Claim 10
Dependent Claim
45 words
The method of fabricating a semiconductor device of claim 8 wherein said first insulating layer comprises a native oxide of the semiconductor material of said substrate, said gate electrode comprises polysilicon and said second insulating layer comprises a native nitride of said polysilicon gate electrode.
Claim 11
Dependent Claim
64 words
The method of fabricating a semiconductor device of claim 1 wherein said step of opening said second window comprises: providing a photoresist layer over a portion of said first protective layer beyond said outer perimeter of said first window, and over a portion of said second protective layer; and employing a reactive ion etch to remove said second portion of said first protective layer.
Claim 12
Dependent Claim
31 words
The method of fabricating a semiconductor device of claim 1 wherein the step of opening said first window comprises removing said first portion of said protective layer with reactive ion etch.
Claim 13
Dependent Claim
31 words
The method of fabricating a semiconductor device of claim 1 wherein the step of opening said first window comprises removing said first portion of said protective layer with buffered hydrofluoric etch.
Claim 14
Dependent Claim
33 words
The method of fabricating a semiconductor device of claim 1 wherein the step of opening said second window comprises removing said second portion of said first protective layer with a reactive ion etch.
Claim 15
Dependent Claim
53 words
The method of fabricating a semiconductor device of claim 1 wherein said first window is opened by photolithographically establishing a mask on the surface of said first protective layer to mask a portion of said first protective layer and subsequently employing an etchant to remove the unmasked region of the first protective layer.
Claim 16
Independent Claim
224 words
A method of fabricating a self aligned semiconductor device comprising the steps of: (a) providing a semiconductor substrate having a major surface; (b) providing a first protective layer atop said substrate surface; (c) opening a first window through a first portion of said first protective layer, said first window having an inner perimeter and an outer perimeter and encompassing a second portion of said first protective layer; (d) closing said first window by providing a second protective layer in said first window; (e) opening a second window by removing said second portion of said first protective layer to expose the portion of said substrate surface thereunder; (f) introducing a first dopant into said substrate through said second window to establish a first doped region, said first doped region being self aligned with respect to said inner perimeter of said first window; (g) closing said second window by forming a third protective layer in said second window; (h) opening a third window by removing said second protective layer; (i) introducing a second dopant through said third window to establish a second doped region, said second doped region being self aligned with respect to said first window; and (j) introducing a third dopant through said third window to establish a third doped region, said third doped region being self aligned with respect to said first window.
Claim 17
Independent Claim
224 words
A method of fabricating a self aligned semiconductor device comprising the steps of: (a) providing a semiconductor substrate having a major surface; (b) providing a first protective layer atop said substrate surface; (c) opening a first window through a first portion of said first protective layer, said first window having an inner perimeter and an outer perimeter and encompassing a second portion of said first protective layer; (d) closing said first window by providing a second protective layer in said first window; (e) opening a second window by removing said second portion of said first protective layer to expose the portion of said substrate surface thereunder; (f) introducing a first dopant into said substrate through said second window to establish a first doped region, said first doped region being self aligned with respect to said inner perimeter of said first window; (g) closing said second window by forming a third protective layer in said second window; (h) opening a third window by removing said second protective layer; (i) introducing a second dopant through said third window to establish a second doped region, said second doped region being self aligned with respect to said first window; and (j) introducing a third dopant through said third window to establish a third doped region, said third doped region being self aligned with respect to said first window.
Claim 18
Dependent Claim
70 words
The method of fabricating a semiconductor device of claim 15 further comprising the steps of: closing said third window by establishing a fourth protective layer in said third window; opening a fourth window by removing said third protective layer to expose a portion of said first and third doped regions; and applying a metallization layer in contact with said first and third regions for shorting said first and third regions.
Claim 19
Dependent Claim
60 words
The method of fabricating a semiconductor device in accordance with claim 16 wherein said first window is coextensive with said third window and said fourth window is coextensive with said second window, whereby the area of said first and third regions in contact with said metallization layer is self aligned with respect to said inner perimeter of said first window.
Claim 20
Dependent Claim
56 words
The method of fabricating a semiconductor device of claim 15 wherein said step of providing a first protective layer atop said substrate comprises the steps of: growing a first insulating layer on said major surface of said substrate; depositing a polysilicon layer atop said first insulating layer; and growing a nitride layer atop said polysilicon layer.
Claim 21
Dependent Claim
38 words
The method of fabricating a semiconductor device of claim 15 wherein said step of opening said first window is performed by photolithographically masking said first protective layer and subsequently etching the unmasked portion of said first protective layer.
Claim 22
Dependent Claim
60 words
The method of fabricating a semiconductor device of claim 19 wherein said first protective layer comprises a first insulating layer, a gate layer and a second insulating layer, and said step of opening said first window comprises employing a reactive ion etch to open said first window through said second insulating layer, said gate layer and said first insulating layer.
Claim 23
Dependent Claim
26 words
The method of fabricating a semiconductor device of claim 20 wherein said first insulating layer comprises a native oxide of the semiconductor material of said substrate.
Claim 24
Dependent Claim
18 words
The method of fabricating a semiconductor device of claim 20 wherein said second insulating layer comprises silicon nitride.
Claim 25
Dependent Claim
77 words
The method of fabricating a semiconductor device of claim 15 wherein said first protective layer comprises a first insulating layer, a gate electrode layer and a second insulating layer and said step of opening second window comprises the steps of: etching said second insulating layer to open a window therethrough; performing a second etch to open a window through said gate electrode layer; and performing a third etch to open a window through said first insulating layer.
Claim 26
Dependent Claim
24 words
The method of fabricating a semiconductor device in accordance with claim 15 wherein the step of introducing said first dopant is accomplished by diffusion.
Claim 27
Dependent Claim
24 words
The method of fabricating a semiconductor device in accordance with claim 15 wherein the step of introducing a first dopant is accomplished by implantation.
Claim 28
Dependent Claim
35 words
The method of fabricating a semiconductor device of claim 15 wherein said first and second doped regions are of one type conductivity and said substrate and said third doped region are of opposite type conductivity.
Claim 29
Dependent Claim
70 words
The method of fabricating a semiconductor device of claim 15 wherein second window is opened by providing a photoresist layer over a portion of said first protective layer lying beyond said outer perimeter of said first window and over at least a portion of said second protective layer and performing a reactive ion etch to remove said second portion of said first protective layer without removing said second protective layer.
Claim 30
Dependent Claim
22 words
The method of fabricating a semiconductor device in accordance with claim 15 wherein said first and second protective layers are differentially etchable.
Claim 31
Dependent Claim
33 words
The self aligned method of fabricating an semiconductor device of claim 15 wherein said first region is deeply diffused, said second region is less deeply diffused and said third region is shallowly diffused.
Claim 32
Dependent Claim
213 words
A self aligned method of fabricating a semiconductor device comprising the steps of: (a) providing a semiconductor substrate of opposite type conductivity, said substrate having a major surface; (b) providing a first protective layer atop said substrate surface; (c) opening a first window through said first protective layer, said first window having an inner perimeter and an outer perimeter and encompassing a second portion of said first protective layer; (d) introducing a one type conductivity dopant through said first window to establish a base appendage region, said base appendage region being self aligned with respect to said first window; (e) closing said first window by providing a second protective layer in said first window; (f) opening a second window by removing the portion of said substrate surface thereunder; (g) introducing a one type conductivity dopant through said second window to establish a central base region, said central base being self aligned with respect to said inner perimeter of said first window; (h) closing said second window by providing a third protective layer in said second window; (i) opening a third window by removing said second protective layer; and (j) introducing a dopant through said third window to establish a source region, said source region being self aligned with respect to said first window.
Claim 33
Dependent Claim
213 words
A self aligned method of fabricating a semiconductor device comprising the steps of: (a) providing a semiconductor substrate of opposite type conductivity, said substrate having a major surface; (b) providing a first protective layer atop said substrate surface; (c) opening a first window through said first protective layer, said first window having an inner perimeter and an outer perimeter and encompassing a second portion of said first protective layer; (d) introducing a one type conductivity dopant through said first window to establish a base appendage region, said base appendage region being self aligned with respect to said first window; (e) closing said first window by providing a second protective layer in said first window; (f) opening a second window by removing the portion of said substrate surface thereunder; (g) introducing a one type conductivity dopant through said second window to establish a central base region, said central base being self aligned with respect to said inner perimeter of said first window; (h) closing said second window by providing a third protective layer in said second window; (i) opening a third window by removing said second protective layer; and (j) introducing a dopant through said third window to establish a source region, said source region being self aligned with respect to said first window.
Claim 34
Dependent Claim
58 words
The self aligned method of fabricating a semiconductor device of claim 30 wherein said step of providing a first protective layer comprises the steps of: providing a first insulating layer; providing a polysilicon layer atop said first insulating layer; providing a second insulating layer atop said polysilicon layer; and providing a nitride layer atop said second insulating layer.
Claim 35
Dependent Claim
38 words
The self aligned method of fabricating a semiconductor device in accordance with claim 30 wherein said first window is established by photolithographically masking said first protective layer and etching said first protective layer to remove unmasked portions thereof.
Claim 36
Dependent Claim
66 words
The self aligned method of fabricating a semiconductor device in accordance with claim 30 wherein said second window is established by photolithographically masking a portion of said first protective layer lying beyond said outer perimeter of said first window and a portion of said second protective layer without masking said second portion of said first protective layer and etching unmasked portions of said first protective layer.
Claim 37
Dependent Claim
25 words
The self aligned method of fabricating a semiconductor device of claim 30 wherein said step of introducing a first dopant is performed by diffusion techniques.
Claim 38
Dependent Claim
26 words
The self aligned method of fabricating a semiconductor device in accordance with claim 30 wherein said step of introducing a first dopant is performed by implantation.
Claim 39
Dependent Claim
28 words
The self aligned method of fabricating a semiconductor device of claim 30 wherein said second protective layer comprises a native oxide of the semiconductor material of said substrate.
Claim 40
Dependent Claim
20 words
The self aligned method of fabricating a semiconductor device of claim 30 wherein said second protective layer comprises silicon dioxide.
Claim 41
Dependent Claim
36 words
The self aligned method of fabricating a semiconductor device of claim 30 wherein said third window is established by photolithographically masking said first and second protective layers and etching unmasked portions of said third protective layer.
Claim 42
Dependent Claim
39 words
The self aligned method of fabricating a semiconductor device of claim 38 further comprising the steps of: providing a fourth protective layer in said third window; removing the photolithographic mask and opening a window through said second protective layer.
Claim 43
Dependent Claim
22 words
The self aligned method of fabricating a semiconductor device of claim 30 wherein said third protective layer is resistant to oxide etch.
Claim 44
Dependent Claim
36 words
The self aligned method of fabricating a semiconductor device in accordance with claim 30 wherein said third region is of opposite type conductivity and said base appendage and central base regions are of one type conductivity.
Claim 45
Dependent Claim
31 words
The self aligned method of fabricating a semiconductor device of claim 30 wherein said central base region is doped to a depth greater than the depth of said base appendage region.
Claim 46
Dependent Claim
23 words
The self aligned method of fabricating an semiconductor device in accordance with claim 30 wherein said source region is shallow and heavily doped.
Claim 47
Independent Claim
198 words
A method of fabricating a self aligned insulated gate semiconductor device comprising the steps of: (a) providing a semiconductor substrate having a major surface; (b) providing a first protective layer atop said substrate surface; (c) opening a first window through a first portion of said first protective layer, said first window having an inner perimeter and an outer perimeter and encompassing a second portion of said first protective layer; (d) introducing a first dopant into said substrate through said first window to establish a first doped region, said first doped region being self aligned with respect to said first window; (e) introducing a second dopant into said first region through said first window to establish a second doped region, said second doped region being self aligned with respect to said first window; (f) closing said first window by disposing a second protective layer in said first window; (g) opening a second window by removing said second portion of said first protective layer; and (h) introducing a third dopant through said second window into said substrate to establish a third doped region, said third doped region being self aligned with respect to said inner perimeter of said first window.
Claim 48
Independent Claim
198 words
A method of fabricating a self aligned insulated gate semiconductor device comprising the steps of: (a) providing a semiconductor substrate having a major surface; (b) providing a first protective layer atop said substrate surface; (c) opening a first window through a first portion of said first protective layer, said first window having an inner perimeter and an outer perimeter and encompassing a second portion of said first protective layer; (d) introducing a first dopant into said substrate through said first window to establish a first doped region, said first doped region being self aligned with respect to said first window; (e) introducing a second dopant into said first region through said first window to establish a second doped region, said second doped region being self aligned with respect to said first window; (f) closing said first window by disposing a second protective layer in said first window; (g) opening a second window by removing said second portion of said first protective layer; and (h) introducing a third dopant through said second window into said substrate to establish a third doped region, said third doped region being self aligned with respect to said inner perimeter of said first window.
Claim 49
Dependent Claim
34 words
The method of fabricating an insulated gate semiconductor device of claim 44 wherein said first and third regions are of one type conductivity and said substrate and second regions are of opposite type conductivity.
Claim 50
Dependent Claim
61 words
The method of fabricating a semiconductor device of claim 44 wherein said step of opening said second window comprises: forming a photoresist layer over a portion of said first protective layer beyond said outer perimeter of said first window and a portion of said second protective layer; and etching the portion of said first protective layer unprotected by said photoresist layer.
Claim 51
Dependent Claim
21 words
The method of fabricating a semiconductor device of claim 46 wherein said protective layers are substantially impermeable to implantation dopant penetration.
Claim 52
Dependent Claim
29 words
The method of fabricating a semiconductor device of claim 44 wherein said first region extends beneath said first protective layer outside of said outer perimeter of said first window.
Claim 53
Dependent Claim
32 words
The method of fabricating a semiconductor device of claim 44 further comprising the step of providing a metallization layer in ohmic contact with a portion of said first and second doped regions.
Claim 54
Dependent Claim
20 words
The method of fabricating a semiconductor device of claim 44 wherein said first protective layer comprises an insulated gate electrode.
Claim 55
Dependent Claim
43 words
The method of fabricating a semiconductor device of claim 44 wherein said first protective layer comprises a first insulating layer disposed atop said substrate, a gate electrode disposed atop said first insulating layer and a second insulating layer disposed atop said gate electrode.
Claim 56
Dependent Claim
46 words
The method of fabricating a semiconductor device of claim 51 wherein said first insulating layer comprises a native oxide of the semiconductor material of said substrate and said second insulating layer comprises a native nitride of the gate electrode material and said gate electrode comprises polysilicon.
Claim 57
Dependent Claim
21 words
The method of fabricating a semiconductor device of claim 44 wherein said first window is opened with an oxide specific etch.
Claim 58
Dependent Claim
23 words
The method of fabricating a semiconductor device of claim 44 wherein the step of forming a first window is performed with KOH etch.
Claim 59
Dependent Claim
25 words
The method of fabricating a semiconductor device of claim 1 wherein the step of forming a second window is performed with a reactive ion etch.
Claim 60
Dependent Claim
43 words
The method of fabricating a semiconductor device of claim 44 wherein the step of opening a first window comprises photolithographically establishing a mask on the surface of said first protective layer and subsequently etching away the unmasked region of the first protective layer.
Claim 61
Independent Claim
213 words
A method of fabricating a self aligned semiconductor device comprising the steps of: (a) providing a semiconductor substrate having a major surface; (b) providing a protective layer atop said major surface; (c) opening a window through a first portion of said protective layer, said window having an inner perimeter and an outer perimeter, encompassing a second portion of said protective layer and being encompassed by a third portion of said protective layer, said window thereby defining first, second, and third portions of said major surface, said first portion of said surface being that portion of said surface which is exposed within said window, said second portion of said surface being that portion which remains protected by said second portion of said protective layer and said third portion of said surface being that portion which remains protected by said third portion of said protective layer; (d) forming a first doped region within said substrate beneath said first portion of said surface, said first doped region being self-aligned with respect to said window; and (e) forming a second doped region within said substrate beneath said second portion of said surface, said second doped region being spaced from said third portion of said surface and self aligned with respect to said inner perimeter of said window.
Claim 62
Independent Claim
213 words
A method of fabricating a self aligned semiconductor device comprising the steps of: (a) providing a semiconductor substrate having a major surface; (b) providing a protective layer atop said major surface; (c) opening a window through a first portion of said protective layer, said window having an inner perimeter and an outer perimeter, encompassing a second portion of said protective layer and being encompassed by a third portion of said protective layer, said window thereby defining first, second, and third portions of said major surface, said first portion of said surface being that portion of said surface which is exposed within said window, said second portion of said surface being that portion which remains protected by said second portion of said protective layer and said third portion of said surface being that portion which remains protected by said third portion of said protective layer; (d) forming a first doped region within said substrate beneath said first portion of said surface, said first doped region being self-aligned with respect to said window; and (e) forming a second doped region within said substrate beneath said second portion of said surface, said second doped region being spaced from said third portion of said surface and self aligned with respect to said inner perimeter of said window.
Claim 63
Dependent Claim
34 words
The self aligned method of fabricating a semiconductor device of claim 57 wherein said first region extends beyond said outer perimeter of said window beneath part of said third portion of said protective layer.
Claim 64
Independent Claim
178 words
A method of fabricating a self aligned semiconductor device comprising the steps of: (a) providing a semiconductor substrate having a major surface; (b) providing a protective layer atop said major surface; (c) opening a window through a first portion of said protective layer, said window having an inner perimeter and an outer perimeter and encompassing a second portion of said protective layer, said window thereby defining first and second portions of said major surface, said first portion of said surface being that portion of said surface which is exposed within said window and said second portion of said surface being that portion which remains protected by said second portion of said protective layer; (d) forming first and second doped regions within said substrate beneath said first portion of said surface, said first and second doped regions each being self aligned with respect to said window; and (e) forming a third doped region within said substrate beneath said second portion of said surface, said third doped region being self aligned with respect to said inner perimeter of said window.
Claim 65
Independent Claim
178 words
A method of fabricating a self aligned semiconductor device comprising the steps of: (a) providing a semiconductor substrate having a major surface; (b) providing a protective layer atop said major surface; (c) opening a window through a first portion of said protective layer, said window having an inner perimeter and an outer perimeter and encompassing a second portion of said protective layer, said window thereby defining first and second portions of said major surface, said first portion of said surface being that portion of said surface which is exposed within said window and said second portion of said surface being that portion which remains protected by said second portion of said protective layer; (d) forming first and second doped regions within said substrate beneath said first portion of said surface, said first and second doped regions each being self aligned with respect to said window; and (e) forming a third doped region within said substrate beneath said second portion of said surface, said third doped region being self aligned with respect to said inner perimeter of said window.
Claim 66
Dependent Claim
56 words
The method of fabricating a semiconductor device of claim 59 wherein said window divides said substrate into three separate regions, a first region underlying said window, a second region underlying said second portion of said protective layer and a third region lying beneath a portion of said protective layer beyond said outer perimeter of said window.
Claim 67
Dependent Claim
20 words
The method recited in claim 60 wherein said third doped region is spaced from said third region of said substrate.
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USPTO Annuity & Maintenance Windows
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| 3.5 Years (Year 4) | 1992-11-27 | 1993-05-29 | 1993-11-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-11-27 | 1997-05-29 | 1997-11-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-11-27 | 2001-05-29 | 2001-11-28 | $7700.00 | Window Closed / Lapsed |