US4931897A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of manufacturing semiconductor capacitive element
Assignee: Mitsubishi Electric Corp
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Filing: 1989-08-07
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Granted: 1990-06-05
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Expires: 2009-08-07
Abstract
Abstract A method of manufacturing a semiconductor capacitor provided with a substrate, a dielectric film formed on the substrate and a pair of electrode layers stacked on both sides of the dielectric film comprises a step of forming a polycrystalline silicon layer for serving as one of the electrode layers on the substrate, a step of making at least a surface region of the polycrystalline silicon layer amorphous, a step of forming the dielectric film on the polycrystalline silicon layer while maintaining an amorphous surface state, and a step of forming another one of the electrode layers on the dielectric film. The lower electrode of the capacitor has its surface or the whole layer made amorphous. The surface of the electrode which is amorphous has smooth surface configuration, thereby improving the quality of the dielectric film formed thereon.
Inventors
- 👤 Katsuhiro Tsukamoto
- 👤 Masahiro Shimizu
- 👤 Hiroshi Miyatake
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 11:22
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/60; H10D1/68; Y; Y10; Y10T; Y10T29/00; Y10T29/43; Y10T29/435
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
89 words
A method of manufacturing a semiconductor capacitor provided with a base, a dielectric film formed on said base and a pair of electrode layers stacked on both sides of said dielectric film, said method comprising the steps of: forming, as one of said electrode layers, a polycrystalline silicon layer on said base having at least a surface region thereof which is amorphous; forming said dielectric film on said polycrystalline silicon layer while maintaining an amorphous surface state; and forming another one of said electrode layers on said dielectric film.
Claim 2
Independent Claim
89 words
A method of manufacturing a semiconductor capacitor provided with a base, a dielectric film formed on said base and a pair of electrode layers stacked on both sides of said dielectric film, said method comprising the steps of: forming, as one of said electrode layers, a polycrystalline silicon layer on said base having at least a surface region thereof which is amorphous; forming said dielectric film on said polycrystalline silicon layer while maintaining an amorphous surface state; and forming another one of said electrode layers on said dielectric film.
Claim 3
Dependent Claim
61 words
A method of manufacturing a semiconductor capacitor according to claim 1, wherein the step of forming said polycrystalline silicon layer having at least surface region thereof is amorphous comprises the steps of: forming a polycrystalline silicon layer for serving as one of said electrode layers on said base; and making at least a surface region of said polycrystalline silicon layer amorphous.
Claim 4
Dependent Claim
41 words
A method of manufacturing a semiconductor capacitor in accordance with claim 2, wherein said step of making said surface region of said polycrystalline silicon layer amorphous includes a step of ion-implanting an impurity into the surface of said polycrystalline silicon layer.
Claim 5
Dependent Claim
45 words
A method of manufacturing a semiconductor capacitor in accordance with claim 3, wherein said ion implantation step is adapted to ion-implant arsenic ions into the surface of said polycrystalline silicon layer in an amount of implantation of 1×10 15 to 5×10 15 /cm 2 .
Claim 6
Dependent Claim
69 words
A method of manufacturing a semiconductor capacitor in accordance with claim 2, wherein said step of forming said polycrystalline silicon layer in which at least said surface region is made amorphous includes the steps of: depositing said polycrystalline silicon layer to which a first impurity is added on said base, and ion-implanting a second impurity into the surface of said polycrystalline silicon layer to make said surface region amorphous.
Claim 7
Dependent Claim
35 words
A method of manufacturing a semiconductor capacitor in accordance with claim 5, wherein said ion implantation step is adapted to ion-implant arsenic ions, inert gas ions or group IV impurity ions as said second impurity.
Claim 8
Dependent Claim
41 words
A method of manufacturing a semiconductor capacitor in accordance with claim 2, wherein said step of forming said dielectric film is carried out in a temperature range causing no recrystallization of said polycrystalline silicon layer whose surface region is made amorphous.
Claim 9
Dependent Claim
26 words
A method of manufacturing a semiconductor capacitor in accordance with claim 7, wherein said dielectric film is formed at a temperature not more than 750° C.
Claim 10
Dependent Claim
41 words
A method of manufacturing a semiconductor capacitor in accordance with claim 7, wherein said dielectric film is formed by depositing a silicon nitride film, a silicon oxide film, a tantalum oxide film, a hafnium oxide film or a titanium oxide film.
Claim 11
Dependent Claim
56 words
A method of manufacturing a semiconductor capacitor in accordance with claim 7, wherein said step of forming said dielectric film includes the steps of: depositing a silicon nitride film by chemical deposition, and oxidizing the surface of said silicon nitride film thereby to form a silicon oxide film on the surface of said silicon nitride film.
Claim 12
Dependent Claim
41 words
A method of manufacturing a semiconductor capacitor in accordance with claim 10, wherein said step of making said surface region of said polycrystalline silicon layer amorphous includes a step of ion-implanting an impurity into the surface of said polycrystalline silicon layer.
Claim 13
Dependent Claim
43 words
A method of manufacturing a semiconductor capacitor according to claim 1, wherein said step of forming said polycrystalline silicon layer having at least surface region thereof made amorphous comprises the step of: depositing an amorphous silicon layer on a surface of said base.
Claim 14
Independent Claim
54 words
A method of maintaining the small grain size of electrode layer comprising the steps of: forming a polycrystalline silicon layer for serving as said electrode layer on a base having at least surface region thereof which is amorphous; and forming an insulating film on said polycrystalline silicon layer while maintaining the amorphous surface state.
Claim 15
Independent Claim
54 words
A method of maintaining the small grain size of electrode layer comprising the steps of: forming a polycrystalline silicon layer for serving as said electrode layer on a base having at least surface region thereof which is amorphous; and forming an insulating film on said polycrystalline silicon layer while maintaining the amorphous surface state.
Claim 16
Independent Claim
51 words
A method of suppressing recrystallization of electrode layer comprising the steps of: forming a polycrystalline silicon layer for serving as said electrode layer on a base having at least surface region thereof which is amorphous; and forming an insulating film on said polycrystalline silicon layer while maintaining the amorphous surface state.
Claim 17
Independent Claim
51 words
A method of suppressing recrystallization of electrode layer comprising the steps of: forming a polycrystalline silicon layer for serving as said electrode layer on a base having at least surface region thereof which is amorphous; and forming an insulating film on said polycrystalline silicon layer while maintaining the amorphous surface state.
Claim 18
Dependent Claim
50 words
In a method of forming an amorphous silicon layer on a surface of base the improvement comprising the steps of: forming a polycrystalline silicon layer on the surface of said base, and introducing impurities by ion implantation to said polysilicon layer so as to make said polycrystalline silicon layer amorphous.
Claim 19
Dependent Claim
50 words
In a method of forming an amorphous silicon layer on a surface of base the improvement comprising the steps of: forming a polycrystalline silicon layer on the surface of said base, and introducing impurities by ion implantation to said polysilicon layer so as to make said polycrystalline silicon layer amorphous.
Claim 20
Dependent Claim
47 words
A capacitor formed on a semiconductor substrate, comprising: a first electrode being a polycrystalline silicon layer including impurities for increasing a conductive rate and having an amorphous silicon surface layer; a dielectric layer formed on said first electrode; and a second electrode formed on said dielectric layer.
Claim 21
Dependent Claim
47 words
A capacitor formed on a semiconductor substrate, comprising: a first electrode being a polycrystalline silicon layer including impurities for increasing a conductive rate and having an amorphous silicon surface layer; a dielectric layer formed on said first electrode; and a second electrode formed on said dielectric layer.
Claim 22
Dependent Claim
93 words
A capacitor formed on semiconductor substrate, comprising: a first electrode being a polycrystalline silicon layer including impurities for increasing a conductive rate, an average grain size of at least surface layer of said polycrystalline silicon being smaller than 1000 Å, a dielectric layer of a thickness of less than 200 Å, in equivalent to silicon oxide film, formed on said first electrode; and a second electrode formed on said dielectric layer; whereby, irregularities in the surface of said first electrode are maintained at a value less than the thickness of said dielectric layer.
Claim 23
Dependent Claim
93 words
A capacitor formed on semiconductor substrate, comprising: a first electrode being a polycrystalline silicon layer including impurities for increasing a conductive rate, an average grain size of at least surface layer of said polycrystalline silicon being smaller than 1000 Å, a dielectric layer of a thickness of less than 200 Å, in equivalent to silicon oxide film, formed on said first electrode; and a second electrode formed on said dielectric layer; whereby, irregularities in the surface of said first electrode are maintained at a value less than the thickness of said dielectric layer.
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