Patent US5017982A successfully refreshed from Google Patents.
US5017982A
Expired / Lapsed
US
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Capacitor in semiconductor device
Assignee: Mitsubishi Electric Corp
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Filing: 1989-11-06
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Granted: 1991-05-21
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Expires: 2009-11-06
Abstract
Abstract A capacitor including two electrode layers and a dielectric interposed between the electrode layers. The dielectric layer includes a silicon nitride film and a silicon oxide film formed on the surface of the silicon nitride film. The thickness of the silicon oxide film is not smaller than 25 Å and not larger than 35 Å. In this thickness range there is attained the maximum capacitor life. The capacitor is used in a semiconductor memory, improving the device reliability.
Inventors
- 👤 Kiyoteru Kobayashi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 07:17
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/30; H10B12/31; H10D; H10D1/00; H10D1/60; H10D1/68
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
79 words
A capacitor comprising: a first electrode layer formed on one major surface of a semiconductor substrate or over said one major surface; a silicon nitride film formed in contact with the surface of said first electrode layer; a silicon oxide film formed in contact with the surface of said silicon nitride film and having a thickness not smaller than 25Å and not larger than 35Å; and a second electrode layer formed on the surface of said silicon oxide film.
Claim 2
Dependent Claim
79 words
A capacitor comprising: a first electrode layer formed on one major surface of a semiconductor substrate or over said one major surface; a silicon nitride film formed in contact with the surface of said first electrode layer; a silicon oxide film formed in contact with the surface of said silicon nitride film and having a thickness not smaller than 25Å and not larger than 35Å; and a second electrode layer formed on the surface of said silicon oxide film.
Claim 3
Dependent Claim
19 words
A capacitor according to claim 1, wherein said first and second electrode layers are formed by a polycrystalline silicon.
Claim 4
Dependent Claim
202 words
A semiconductor memory including a memory cell having one access transistor and one capacitor and also comprising; a semiconductor substrate having on a major surface thereof an insulating film for the isolation of said memory cell, said access transistor having a pair of source/drain regions formed on the major surface of said semiconductor substrate and a gate electrode formed through a gate insulating on the major surface of said semiconductor substrate positioned between said source/drain regions, said gate electrode being connected to a word line, said capacitor having a first electrode layer one end of which is positioned on said gate electrode through an insulating film and the other end positioned on said insulating film for the isolation of said memory cell and part of which is connected to one of said source/drain regions, also having a dielectric layer formed on said first electrode layer and further having a second electrode layer formed on said dielectric layer, said dielectric layer/including a silicon nitride film formed in contact with the surface of said first electrode layer and a silicon oxide film formed on the surface of said silicon nitride film and having a thickness not smaller than 25Å and not larger than 35Å.
Claim 5
Dependent Claim
202 words
A semiconductor memory including a memory cell having one access transistor and one capacitor and also comprising; a semiconductor substrate having on a major surface thereof an insulating film for the isolation of said memory cell, said access transistor having a pair of source/drain regions formed on the major surface of said semiconductor substrate and a gate electrode formed through a gate insulating on the major surface of said semiconductor substrate positioned between said source/drain regions, said gate electrode being connected to a word line, said capacitor having a first electrode layer one end of which is positioned on said gate electrode through an insulating film and the other end positioned on said insulating film for the isolation of said memory cell and part of which is connected to one of said source/drain regions, also having a dielectric layer formed on said first electrode layer and further having a second electrode layer formed on said dielectric layer, said dielectric layer/including a silicon nitride film formed in contact with the surface of said first electrode layer and a silicon oxide film formed on the surface of said silicon nitride film and having a thickness not smaller than 25Å and not larger than 35Å.
Claim 6
Dependent Claim
20 words
A semiconductor memory according to claim 3, wherein said first and second electrode layers are formed by a polycrystalline silicon.
References Cited (Backward Citations)
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1994-05-20 | 1994-11-19 | 1995-05-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-05-20 | 1998-11-19 | 1999-05-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-05-20 | 2002-11-19 | 2003-05-21 | $7700.00 | Window Closed / Lapsed |