← Back to Patent Explorer
US5129142A Expired / Lapsed US ⏱️ 0.0 years remaining

Encapsulated circuitized power core alignment and lamination

Assignee: International Business Machines Corp
•
Filing: 1990-10-30
•
Granted: 1992-07-14
•
Expires: 2010-10-30
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A structure and method are disclosed for making high density circuit board. Using photosensitive or other dielectric materials over a circuitized power core, vias and lands are opened up, filled with joining metal and aligned with the next level, eliminating a major registration problem in building up a high density composite and reducing the number of steps in the manufacturing process.

Inventors

  • 👤 Perminder S. Bindra
  • 👤 Dennis A. Canfield
  • 👤 Voya R. Markovich
  • 👤 Jeffrey McKeveny
  • 👤 Robert E. Ruane
  • 👤 Edwin L. Thomas

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 07:54
CPC Classifications
H; H05; H05K; H05K3/00; H05K3/46; H05K3/4611; H05K3/4614; H05K3/462; H05K3/44; H05K3/445; H05K1/00; H05K1/02; H05K1/0272; H05K2201/00; H05K2201/03; H05K2201/0302; H05K2201/0305; H05K2201/0332; H05K2201/0364; H05K2201/0373; H05K2201/09; H05K2201/09209; H05K2201/095; H05K2201/09536; H05K2201/09563; H05K2201/09572; H05K2201/096; H05K2203/00; H05K2203/03; H05K2203/0307; H05K2203/05; H05K2203/0502; H05K2203/054; H05K3/0011; H05K3/0017; H05K3/0023; H05K3/22; H05K3/28; H05K3/36; H05K3/40; H05K3/4038; H05K3/4053; H05K3/4069; H05K3/4076; H05K3/42; H05K3/423; H05K3/425; H05K3/428; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/49126; Y10T29/49155; Y10T29/49165

Claims Analysis

Total Claims: 15
Claim 1
Independent Claim 196 words
A method of making an encapsulated circuitized power core for a multilayered printed circuit board, said method comprising the steps of: providing a circuitized power core including a dielectric coated power plane, signal lines and lands located on external surfaces of said dielectric coated power plane, and a plurality of vias extending between said external surfaces; coating said circuitized power core with a first layer of dielectric material; opening up discrete areas in said first layer of dielectric material corresponding to preselected ones of said vias and lands in said circuitized power core; depositing an electrically continuous metal layer in said vias, on said lands and over said first layer of dielectric material; coating said electrically continuous metal layer with a second layer of dielectric material; opening up discrete areas in said second layer of dielectric material corresponding to said preselected ones of said vias and lands in said circuitized power core; metallizing said preselected ones of said vias by providing a quantity of joining metal therein; removing said second layer of dielectric material; and removing said electrically continuous metal layer such that said quantity of joining metal extends above said first layer of dielectric material.
Claim 2
Independent Claim 196 words
A method of making an encapsulated circuitized power core for a multilayered printed circuit board, said method comprising the steps of: providing a circuitized power core including a dielectric coated power plane, signal lines and lands located on external surfaces of said dielectric coated power plane, and a plurality of vias extending between said external surfaces; coating said circuitized power core with a first layer of dielectric material; opening up discrete areas in said first layer of dielectric material corresponding to preselected ones of said vias and lands in said circuitized power core; depositing an electrically continuous metal layer in said vias, on said lands and over said first layer of dielectric material; coating said electrically continuous metal layer with a second layer of dielectric material; opening up discrete areas in said second layer of dielectric material corresponding to said preselected ones of said vias and lands in said circuitized power core; metallizing said preselected ones of said vias by providing a quantity of joining metal therein; removing said second layer of dielectric material; and removing said electrically continuous metal layer such that said quantity of joining metal extends above said first layer of dielectric material.
Claim 3
Dependent Claim 69 words
The method recited in claim 1, comprising the further steps of: aligning said selected ones of said vias and said dielectric material of said circuitized power core to corresponding vias and dielectric material in at least one additional circuitized power core and laminating said circuitized power cores under temperature and pressure sufficient for both electrically joining said vias and for joining said aligned dielectric materials to form a composite.
Claim 4
Dependent Claim 20 words
The method recited in claim 1, wherein said first circuitized power core is coated with a high performance dielectric material.
Claim 5
Dependent Claim 15 words
The method recited in claim 2, wherein said high performance dielectric material comprises a fluoropolymer.
Claim 6
Dependent Claim 23 words
The method recited in claim 1 including roughening said first layer of dielectric material and thereafter depositing said electrically continuous metal layer thereon.
Claim 7
Dependent Claim 14 words
The method recited in claim 5 wherein said roughening is accomplished by vapor blasting.
Claim 8
Dependent Claim 15 words
The method recited in claim 3 wherein said high performance dielectric material includes a filler.
Claim 9
Dependent Claim 40 words
The method recited in claim 1 wherein said second dielectric material is photoactive, said step of opening up said discrete areas comprising exposing and developing said discrete areas in said photoactive dielectric material relative to said preselected vias and lands.
Claim 10
Dependent Claim 14 words
The method recited in claim 1, further comprising testing said encapsulated circuitized power core.
Claim 11
Dependent Claim 23 words
The method recited in claim 1, wherein said opening up of said discrete areas in said second dielectric is accomplished by laser drilling.
Claim 12
Dependent Claim 13 words
The method recited in claim 1 wherein said joining metal comprises a solder.
Claim 13
Dependent Claim 25 words
The method recited in claim 1, wherein said solder is selected from the group consisting essentially of gold, copper, tin, lead, bismuth and alloys thereof.
Claim 14
Dependent Claim 16 words
The method recited in claim 1, wherein said electrically continuous metal layer is deposited by sputtering.
Claim 15
Dependent Claim 26 words
The method recited in claim 1 further including providing said joining metal with dendrites or cones for temporary connection and testing prior to aligning and lamination.

References Cited (Backward Citations)

US3676566A Cited
US3934334A Cited
US3984244A Cited
US4368503A Cited
US4394712A Cited
US4670770A Cited
US4830264A Cited
US4803450A Cited
US4868350A Cited
US4854038A Cited
US4864722A Cited
US4908933A Cited
US4845311A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-07-14 1996-01-13 1996-07-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-07-14 2000-01-13 2000-07-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-07-14 2004-01-13 2004-07-14 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag