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US5206552A Expired / Lapsed US ⏱️ 0.0 years remaining

Sense amplifier for non-volatile semiconductor storage device

Assignee: NEC Electronics Corp
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Filing: 1991-10-15
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Granted: 1993-04-27
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Expires: 2011-10-15
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Abstract

Abstract A sense amplifier for a non-volatile semiconductor storage device includes a true and a complementary load circuit which are for holding the potentials of input signals and which have the current driving capability lower than that of each memory cell of the semiconductor storage device. These true and complementary load circuits are connected with a true and a complementary input terminal of the conventional sense amplifier. In accordance with the output logical value of the sense amplifier, if it is in the "H" level, the complementary load circuit is activated whereas if it is in the "L" level, the true load circuit is activated. In this way, the operation speed of the sense amplifier at a memory cell selecting operation can be effectively improved.

Inventors

  • 👤 Shinichi Iwashita

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 15:18
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/22; H03K5/24; H03K5/2472; H03K5/2481; G; G11; G11C; G11C16/00; G11C16/02; G11C16/06; G11C16/26; G11C16/28; G11C7/00; G11C7/06; G11C7/062

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 219 words
A sense amplifier for a non-volatile semiconductor storage device having a plurality of memory cells in a memory cell array, said sense amplifier comprising: a true and a complementary input terminal (TI, TII) for receiving a true and a complementary input signal (SI, SII) from said memory cells; first and second current mirror circuits (13,14) which amplify and detect said true and said complementary input signal from said memory cells, respectively; a true and a complementary input signal stabilizing circuit having input nodes connected to said true and complementary input terminals, respectively, and having output nodes connected to input nodes of said first and second current mirror circuits, respectively, for suppressing potential variations in said true and complementary input signals; true and complementary input signal potential holding means (16,17) which are connected with said true and said complementary input terminal, respectively, for holding potentials of the true and complementary input signals and having a current driving capability which is lower than the current driving capability of said memory cell in said memory cell array; and true and complementary sense signal producing circuit (IN3,IN4) for producing a true and a complementary sense signals which determine an operation or non-operation of said true and said complementary input signal potential holding means based on an output logical value of the sense amplifier.
Claim 2
Dependent Claim 219 words
A sense amplifier for a non-volatile semiconductor storage device having a plurality of memory cells in a memory cell array, said sense amplifier comprising: a true and a complementary input terminal (TI, TII) for receiving a true and a complementary input signal (SI, SII) from said memory cells; first and second current mirror circuits (13,14) which amplify and detect said true and said complementary input signal from said memory cells, respectively; a true and a complementary input signal stabilizing circuit having input nodes connected to said true and complementary input terminals, respectively, and having output nodes connected to input nodes of said first and second current mirror circuits, respectively, for suppressing potential variations in said true and complementary input signals; true and complementary input signal potential holding means (16,17) which are connected with said true and said complementary input terminal, respectively, for holding potentials of the true and complementary input signals and having a current driving capability which is lower than the current driving capability of said memory cell in said memory cell array; and true and complementary sense signal producing circuit (IN3,IN4) for producing a true and a complementary sense signals which determine an operation or non-operation of said true and said complementary input signal potential holding means based on an output logical value of the sense amplifier.
Claim 3
Dependent Claim 64 words
A sense amplifier according to claim 1, wherein each of said true and said complementary signal input potential holding means comprises a plurality of active elements which are connected in a cascade form, and a driving element which drives said plurality of active elements in response to each of said true and complementary sense signals from said true and complementary sense signal producing circuit.
Claim 4
Dependent Claim 18 words
A sense amplifier according to claim 2, wherein said active elements are Floating Avalanche MOS transistors (FAMOS transistors).
Claim 5
Dependent Claim 25 words
A sense amplifier according to claim 1, wherein each of said true and said complementary signal input potential holding means is composed of passive elements.
Claim 6
Dependent Claim 79 words
A sense amplifier according to claim 1, wherein said true and complementary sense signal producing circuit comprises first stage and second stage inverter circuits which are connected in cascade, said first stage inverter circuit having an input node connected to an output node of said sense amplifier and an output node connected to said true input signal potential holding means, and said second stage inverter circuit having an output node connected to said complementary input signal potential holding means.

References Cited (Backward Citations)

GB2089612A Cited
US4728900A Cited
US4802138A Cited
US4827158A Cited
US5077496A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-04-26 1996-10-26 1997-04-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-04-26 2000-10-26 2001-04-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-04-26 2004-10-26 2005-04-27 $7700.00 Window Closed / Lapsed

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