US5495181A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Integrated circuit facilitating simultaneous programming of multiple antifuses
Assignee: QuickLogic Corp
•
Filing: 1994-12-01
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Granted: 1996-02-27
•
Expires: 2014-12-01
Abstract
Abstract To facilitate the simultaneous programming of multiple antifuses on an integrated circuit, a first current path is established from a first programming terminal (VPP1) of a programmable logic device through a first antifuse to be programmed and a second current path is established from a second programming terminal (VPP2) of the programmable logic device through a second antifuse to be programmed. By supplying the programming current for programming the first antifuse from a different terminal than the programming current for programming the second antifuse, the two antifuses can be programmed simultaneously with an adequate amount of programming current being supplied to each antifuse. A programming current multiplexer circuit is disclosed for selectively coupling either a first programming voltage (VPP1) terminal, a second programming voltage (VPP2), or a ground terminal (GND) to a programming bus and/or to an antifuse to be programmed. The first and second current paths can be established using multiple such programming current multiplexer circuits.
Inventors
- 👤 Paige A. Kolze
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 08:18
CPC Classifications
G; G11; G11C; G11C17/00; G11C17/14; G11C17/18
Claims Analysis
Total Claims: 26
Claim 1
Independent Claim
81 words
An integrated circuit, comprising: an antifuse; a first programming current terminal; a second programming current terminal; a third programming current terminal; a programming current multiplexer circuit having a first input lead coupled to said first programming current terminal, a second input lead coupled to said second programming current terminal, a third input lead coupled to said third programming current terminal, and an output lead; and an electrical connection coupling said antifuse to said output lead of said programming current multiplexer circuit.
Claim 2
Dependent Claim
81 words
An integrated circuit, comprising: an antifuse; a first programming current terminal; a second programming current terminal; a third programming current terminal; a programming current multiplexer circuit having a first input lead coupled to said first programming current terminal, a second input lead coupled to said second programming current terminal, a third input lead coupled to said third programming current terminal, and an output lead; and an electrical connection coupling said antifuse to said output lead of said programming current multiplexer circuit.
Claim 3
Dependent Claim
67 words
The integrated circuit of claim 1, wherein said first programming current terminal is a programming voltage terminal for coupling said integrated circuit to a first programming voltage, wherein said second programming current terminal is a programming voltage terminal for coupling said integrated circuit to a second programming voltage, and wherein said third programming current terminal is a ground terminal for coupling said integrated circuit to ground potential.
Claim 4
Dependent Claim
19 words
The integrated circuit of claim 2, wherein said first programing voltage is the same as said second programming voltage.
Claim 5
Dependent Claim
15 words
The integrated circuit of claim 1, wherein said electrical connection comprises no programming pass transistors.
Claim 6
Dependent Claim
15 words
The integrated circuit of claim 1, wherein said electrical connection comprises a programming disable transistor.
Claim 7
Dependent Claim
71 words
The integrated circuit of claim 1, further comprising: a second programming current multiplexer circuit having a first input lead coupled to said first programming current terminal, a second input lead coupled to said second programming current terminal, a third input lead coupled to said third programming current terminal, and an output lead; and a second electrical connection coupling said antifuse to said output lead of said second programming current multiplexer circuit.
Claim 8
Dependent Claim
38 words
The integrated circuit of claim 1, wherein said programming current multiplexer circuit comprises a shift register, data bits in said shift register controlling which of said first, second and third input leads is coupled to said output lead.
Claim 9
Dependent Claim
38 words
The integrated circuit of claim 7, wherein said integrated circuit further comprises: a serial programming data input terminal, said programming current multiplexer circuit having a serial programming data input lead coupled to said serial programming data input terminal.
Claim 10
Dependent Claim
101 words
The integrated circuit of claim 7, said programming current multiplexer circuit further comprising: a first programming current field effect transistor having a control electrode; a second programming current field effect transistor having a control electrode; a third programming current field effect transistor having a control electrode; and a decoder having input leads and output leads, said input leads of said decoder being coupled to output leads of said shift register, each respective one of said output leads of said decoder being coupled to a corresponding one of the control electrodes of said first, second and third programming current field effect transistors.
Claim 11
Dependent Claim
27 words
The integrated circuit of claim 1, further comprising: a VCC terminal, wherein said programming current multiplexer circuit has a fourth input lead coupled to said VCC terminal.
Claim 12
Dependent Claim
124 words
The integrated circuit of claim 1, wherein said programming current multiplexer circuit comprises: a first field effect transistor having a first electrode coupled to said first input lead of said programming current multiplexer circuit, a second electrode coupled to said output lead of said programming current multiplexer circuit, and a control electrode; a first charge pump circuit coupled to said control electrode of said first field effect transistor; a second field effect transistor having a first electrode coupled to said second input lead of said programming current multiplexer circuit, a second electrode coupled to said output lead of said programming current multiplexer circuit, and a control electrode; and a second charge pump circuit coupled to said control electrode of said second field effect transistor.
Claim 13
Dependent Claim
34 words
The integrated circuit of claim 1, wherein said programming current multiplexer circuit further comprises: means for coupling said output lead of said programming current multiplexer circuit to a voltage VCC prior to antifuse programming.
Claim 14
Dependent Claim
61 words
The integrated circuit of claim 1, wherein said first input lead is coupled to said first programming current terminal via a first isolation transistor, wherein said second input lead is coupled to said second programming current terminal via a second isolation transistor, and wherein said third input lead is coupled to said third programming current terminal via a third isolation transistor.
Claim 15
Dependent Claim
22 words
The integrated circuit of claim 1, wherein said electrical connection comprises a programming pass transistor through which a programming current can flow.
Claim 16
Dependent Claim
266 words
An integrated circuit, comprising: a first programming current terminal; a second programming current terminal; a third programming current terminal; a first programming bus; a second programming bus; a third programming bus; a fourth programming bus; a first programming current multiplexer circuit having a first input lead coupled to said first programming current terminal, a second input lead coupled to said second programming current terminal, a third input lead coupled to said third programming current terminal, and an output lead coupled to said first programming bus; a second programming current multiplexer circuit having a first input lead coupled to said first programming current terminal, a second input lead coupled to said second programming current terminal, a third input lead coupled to said third programming current terminal, and an output lead coupled to said second programming bus; a third programming current multiplexer circuit having a first input lead coupled to said first programming current terminal, a second input lead coupled to said second programming current terminal, a third input lead coupled to said third programming current terminal, and an output lead coupled to said third programming bus; a fourth programming current multiplexer circuit having a first input lead coupled to said first programming current terminal, a second input lead coupled to said second programming current terminal, a third input lead coupled to said third programming current terminal, and an output lead coupled to said fourth programming bus; a first antifuse programmable by current flowing from said first to said second programming bus; and a second antifuse programmable by current flowing from said third to said fourth programming bus.
Claim 17
Dependent Claim
266 words
An integrated circuit, comprising: a first programming current terminal; a second programming current terminal; a third programming current terminal; a first programming bus; a second programming bus; a third programming bus; a fourth programming bus; a first programming current multiplexer circuit having a first input lead coupled to said first programming current terminal, a second input lead coupled to said second programming current terminal, a third input lead coupled to said third programming current terminal, and an output lead coupled to said first programming bus; a second programming current multiplexer circuit having a first input lead coupled to said first programming current terminal, a second input lead coupled to said second programming current terminal, a third input lead coupled to said third programming current terminal, and an output lead coupled to said second programming bus; a third programming current multiplexer circuit having a first input lead coupled to said first programming current terminal, a second input lead coupled to said second programming current terminal, a third input lead coupled to said third programming current terminal, and an output lead coupled to said third programming bus; a fourth programming current multiplexer circuit having a first input lead coupled to said first programming current terminal, a second input lead coupled to said second programming current terminal, a third input lead coupled to said third programming current terminal, and an output lead coupled to said fourth programming bus; a first antifuse programmable by current flowing from said first to said second programming bus; and a second antifuse programmable by current flowing from said third to said fourth programming bus.
Claim 18
Dependent Claim
51 words
The integrated circuit of claim 15, wherein said first programming bus is roughly collinear with said third programming bus, said first and third programming buses being metal conductors, and wherein said second programming bus is roughly collinear with said fourth programming bus, said second and fourth programming buses being metal conductors.
Claim 19
Dependent Claim
33 words
The integrated circuit of claim 16, wherein said first programming bus is substantially parallel with said second programming bus, and wherein said third programming bus is substantially parallel with said fourth programming bus.
Claim 20
Dependent Claim
33 words
The integrated circuit of claim 15, wherein said first programming bus is substantially perpendicular with said second programming bus, and wherein said third programming bus is substantially parallel with the fourth programming bus.
Claim 21
Dependent Claim
33 words
The integrated circuit of claim 15, wherein said first programming bus is substantially perpendicular with said second programming bus, and wherein said third programming bus is substantially perpendicular with said fourth programming bus.
Claim 22
Dependent Claim
80 words
An integrated circuit, comprising: a first antifuse; a second antifuse; a first programming current terminal; a second programming current terminal; and means for simultaneously programming said first antifuse with a first programming current and said second antifuse with a second programming current, said first programming current flowing through said first programming current terminal and not through said second programming current terminal, said second programming current flowing through said second programming current terminal and not through said first programming current terminal.
Claim 23
Dependent Claim
80 words
An integrated circuit, comprising: a first antifuse; a second antifuse; a first programming current terminal; a second programming current terminal; and means for simultaneously programming said first antifuse with a first programming current and said second antifuse with a second programming current, said first programming current flowing through said first programming current terminal and not through said second programming current terminal, said second programming current flowing through said second programming current terminal and not through said first programming current terminal.
Claim 24
Dependent Claim
28 words
The integrated circuit of claim 20 wherein both said first programming current and said second programming current flow through a third programming current terminal of said integrated circuit.
Claim 25
Independent Claim
104 words
A method of substantially simultaneously programming a first antifuse and a second antifuse of an integrated circuit, comprising: establishing a first current path from a first programming current terminal of said integrated circuit and through said first antifuse; and establishing a second current path from a second programming current terminal of said integrated circuit and through said second antifuse, a first programming current flowing in said first current path but not flowing in said second current path, a second programming current flowing in said second current path but not flowing in said first current path, said first and second programming currents flowing substantially simultaneously.
Claim 26
Independent Claim
104 words
A method of substantially simultaneously programming a first antifuse and a second antifuse of an integrated circuit, comprising: establishing a first current path from a first programming current terminal of said integrated circuit and through said first antifuse; and establishing a second current path from a second programming current terminal of said integrated circuit and through said second antifuse, a first programming current flowing in said first current path but not flowing in said second current path, a second programming current flowing in said second current path but not flowing in said first current path, said first and second programming currents flowing substantially simultaneously.
References Cited (Backward Citations)
US3987287A
Cited
US4207556A
Cited
US4455495A
Cited
US4442507A
Cited
US4433331A
Cited
US4870302A
Cited
US4670749A
Cited
US4642487A
Cited
US4924287A
Cited
US4949084A
Cited
US4783763A
Cited
US4749947A
Cited
US4698589A
Cited
US5134457A
Cited
US4899205A
Cited
US4873459B1
Cited
US5341092A
Cited
US4758745A
Cited
US4873459A
Cited
US5187393A
Cited
US5208530A
Cited
US4857774A
Cited
US5223792A
Cited
US5309091A
Cited
US4910417A
Cited
US5083083A
Cited
US4758745B1
Cited
US5172014A
Cited
US5015885A
Cited
US4786904A
Cited
US4963770A
Cited
US5049969A
Cited
US5003200A
Cited
US4910418A
Cited
US4945267A
Cited
US4933898A
Cited
US4969124A
Cited
US5008855A
Cited
EP0416903A2
Cited
US4972105A
Cited
US5070384A
Cited
US5200632A
Cited
US5198705A
Cited
US5055718A
Cited
US5126282A
Cited
US5194759A
Cited
US5073729A
Cited
US5191241A
Cited
US5132571A
Cited
US5140554A
Cited
US5099149A
Cited
US5130777A
Cited
US5166556A
Cited
US5220213A
Cited
US5095228A
Cited
US5196724A
Cited
US5341030A
Cited
US5302546A
Cited
US5243226A
Cited
US5327024A
Cited
US5294846A
Cited
US5317698A
Cited
US5316971A
Cited
US5341043A
Cited
US5371414A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-02-26 | 1999-08-28 | 2000-02-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-02-26 | 2003-08-28 | 2004-02-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-02-26 | 2007-08-28 | 2008-02-27 | $7700.00 | Window Closed / Lapsed |