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US5576566A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor trench capacitor cell having a buried strap

Assignee: International Business Machines Corp
•
Filing: 1995-04-13
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Granted: 1996-11-19
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Expires: 2015-04-13
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Abstract

Abstract A semiconductor trench capacitor structure having a first level aligned isolation structure and buried strap that extends from within the trench into the doped semiconductor substrate. The semiconductor trench capacitor structure may be fabricated by forming a shallow trench within the trench capacitor and semiconductor substrate, depositing a layer of conductive material within the shallow trench, using a mask to define and recess the strap and depositing insulating material within the shallow trench.

Inventors

  • 👤 Donald M. Kenney

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 13:56
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/038

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 108 words
A semiconductor device, comprising: a semiconductor substrate; a first trench extending from an upper trench level into said substrate, said trench having a first insulating portion with a conductive material situated therein; a doped region disposed adjacent said trench below said upper trench level; and a second trench extending into said doped region and partially intersecting said first trench, said second trench having a first conductive strap adjacent both said conductive material within said first trench and said doped region, said second trench having a second insulation portion at least partially filling said second trench and positioned over and adjacent said first conductive strap of said second trench.
Claim 2
Dependent Claim 108 words
A semiconductor device, comprising: a semiconductor substrate; a first trench extending from an upper trench level into said substrate, said trench having a first insulating portion with a conductive material situated therein; a doped region disposed adjacent said trench below said upper trench level; and a second trench extending into said doped region and partially intersecting said first trench, said second trench having a first conductive strap adjacent both said conductive material within said first trench and said doped region, said second trench having a second insulation portion at least partially filling said second trench and positioned over and adjacent said first conductive strap of said second trench.
Claim 3
Dependent Claim 39 words
The semiconductor structure of claim 1 wherein said second trench has a bottom and wherein said strap is in contact with the bottom of said second trench and all of said strap is disposed below said upper trench level.
Claim 4
Dependent Claim 26 words
The semiconductor structure of claim 1 wherein the second insulation portion of the second trench adjacent said strap extends deeper into said substrate than the strap.
Claim 5
Dependent Claim 34 words
The semiconductor structure of claim 1 wherein said second insulation portion extends over the conductive material of said first trench and said second insulation portion surrounds all but a bottom surface of the strap.
Claim 6
Dependent Claim 20 words
The semiconductor structure of claim 1 further comprising a dielectric layer disposed over an upper surface of said semiconductor substrate.
Claim 7
Dependent Claim 22 words
The semiconductor structure of claim 5 wherein said dielectric layer comprises a layer of silicon nitride over a layer of silicon oxide.
Claim 8
Dependent Claim 21 words
The semiconductor structure of claim 1 wherein a transistor is positioned adjacent to the first trench and opposite to said strap.
Claim 9
Dependent Claim 20 words
The semiconductor structure of claim 6 wherein an active semiconductor channel of an electronic device lies adjacent said first trench.

References Cited (Backward Citations)

US4801988A Cited
US4918502A Cited
US4939567A Cited
JPH01192164A Cited
US5223447A Cited
US5034787A Cited
US4988637A Cited
US5198995A Cited
EP0538009A2 Cited
US5264716A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-11-19 2000-05-20 2000-11-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-11-19 2004-05-20 2004-11-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-11-19 2008-05-20 2008-11-19 $7700.00 Window Closed / Lapsed

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