US5790290A
Expired / Lapsed
US
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Optical distribution system having time switch
Assignee: Hitachi Ltd
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Filing: 1997-08-04
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Granted: 1998-08-04
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Expires: 2017-08-04
Abstract
Abstract Optical paths to propagate a plurality of optical information signals intersect optical paths to transmit light signals to a plurality of subscribers. Light power dividing and propagation direction changing devices for separating requested optical information signals are arranged at the intersecting points. Losses of the optical information signals, due to the separation, are compensated by optical amplification, so that the signals can be distributed to all of the subscribers while maintaining a predetermined intensity. Thus, the same photosignal can be distributed to a plurality of subscribers. The system can be easily expanded in correspondence to an increase in the number of optical information signals and an increase in the number of subscribers.
Inventors
- 👤 Shigeki Kitajima
- 👤 Toshio Kirihara
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 17:52
CPC Classifications
H; H04; H04Q; H04Q11/00; H04Q11/0001; H04Q11/0062; H04Q11/0067; H04Q11/0005; H04Q2011/0007; H04Q2011/0013; H04Q2011/0015; H04Q2011/0037; H04Q2011/0041; H04Q2011/0043; H04Q2011/0047; H04Q2011/0052; H04Q2011/0079; H04Q2011/0081; H04Q2011/0086; H04Q2011/009
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
111 words
An optical distribution system comprising: an optical signal supplier for supplying at least m photosignals; an optical signal delivery circuit for delivering at least n photosignals; and a time switch having m inputs connected to said optical signal supplier and n outputs connected to said optical signal delivery circuit, said time switch comprising: a memory having h memory cells, wherein m>h and n>h, wherein h, m, and n are integers, a write controller, operatively associated with said memory, which controls writing from said m inputs to said h memory cells, and a read controller, operatively associated with said memory, which controls reading from said h memory cells to said n outputs.
Claim 2
Dependent Claim
111 words
An optical distribution system comprising: an optical signal supplier for supplying at least m photosignals; an optical signal delivery circuit for delivering at least n photosignals; and a time switch having m inputs connected to said optical signal supplier and n outputs connected to said optical signal delivery circuit, said time switch comprising: a memory having h memory cells, wherein m>h and n>h, wherein h, m, and n are integers, a write controller, operatively associated with said memory, which controls writing from said m inputs to said h memory cells, and a read controller, operatively associated with said memory, which controls reading from said h memory cells to said n outputs.
Claim 3
Dependent Claim
107 words
An signal distribution system comprising: a signal supplier for supplying at least m signals; a signal delivery circuit for delivering at least n signals; and a time switch having m inputs connected to said signal supplier and n outputs connected to said signal delivery circuit, said time switch comprising: a memory having h memory cells, wherein m>h and n>h, wherein h, m, and n are integers a write controller, operatively associated with said memory, which controls writing from said m inputs to said h memory cells, and a read controller, operatively associated with said memory, which controls reading from said h memory cells to said n outputs.
Claim 4
Dependent Claim
107 words
An signal distribution system comprising: a signal supplier for supplying at least m signals; a signal delivery circuit for delivering at least n signals; and a time switch having m inputs connected to said signal supplier and n outputs connected to said signal delivery circuit, said time switch comprising: a memory having h memory cells, wherein m>h and n>h, wherein h, m, and n are integers a write controller, operatively associated with said memory, which controls writing from said m inputs to said h memory cells, and a read controller, operatively associated with said memory, which controls reading from said h memory cells to said n outputs.
References Cited (Backward Citations)
FR2429445A1
Cited
JPS5597752A
Cited
GB2093304A
Cited
GB2156178A
Cited
JPS6191623A
Cited
US4973956A
Cited
US5044745A
Cited
EP0446437A2
Cited
US5365519A
Cited
US5276425A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-08-03 | 2002-02-02 | 2002-08-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-08-03 | 2006-02-02 | 2006-08-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-08-03 | 2010-02-02 | 2010-08-04 | $7700.00 | Window Closed / Lapsed |