Method and apparatus for executing a raster operation in a graphics controller circuit

Claim 2

A graphics controller for executing a raster operation on a stream of input pixel data, comprising: a plurality of pipelines including at least a first pipeline and a second pipeline for performing a set of operations on the stream of input pixel data to generate a first operand and a second operand, respectively, for the raster operation; and a rasterop unit coupled to said plurality of pipelines to receive the first operand and the second operand, for executing the raster operation using the first operand and the second operand to generate a set of display pixel data, wherein said first pipeline and said second pipeline comprise: a memory interface for receiving the set of pixel data; a converter for converting the set of pixel data to a set of color pixel data if the set of pixel data comprise monochrome pixel data; a barrel shifter for rotating the set of pixel data within a word to generate a set of rotated data words; and an operand storage unit coupled to said convertor and said barrel shifter for receiving the set of color pixel data and the set of rotated data words.

Claim 3

The graphics controller of claim 1, further comprising: an interface to transfer the set of display pixel data to a memory, wherein said memory stores the set of display pixel data, and wherein said graphics controller generates a set of display signals to a display unit from the set of pixel data stored in said memory.

Claim 4

The graphics controller of claim 2, wherein said plurality of pipelines further comprises: a third pipeline for performing a set of operations on the stream of input pixel data to generate a third operand for the raster operation.

Claim 5

The graphics controller of claim 3, further comprising: an interpolation unit for interpolating the stream of input pixel data to generate pixel data corresponding to an upscaled video image.

Claim 6

The graphics controller of claim 3, wherein said interpolation unit provides pixel data corresponding to the upscaled video image as the second operand to said rasterop unit.

Claim 7

The graphics controller of claim 3, further comprising: a pixel FIFO for receiving the set of pixel data from said rasterop unit, wherein said interface transfers the set of pixel data from said pixel FIFO to said memory.

Claim 8

The computer system of claim 6, wherein said color transparency generator generates the write enable mask for the color pixel data in 24 bits per pixel format, and wherein eight color pixel data are packed in three 64-bit words.

Claim 9

A graphics controller for executing a raster operation on a stream of input pixel data, comprising: a plurality of pipelines including at least a first pipeline and a second pipeline for performing a set of operations on the stream of input pixel data to generate a first operand and a second operand, respectively, for the raster operation; a rasterop unit coupled to said plurality of pipelines to receive the first operand and the second operand, for executing the raster operation using the first operand and the second operand to generate a set of display pixel data; an interface to transfer the set of display pixel data to a memory; and a transparency unit for generating a write enable mask, wherein said memory stores the set of display pixel data, wherein said graphics controller generates a set of display signals to a display unit from the set of pixel data stored in said memory, and wherein said memory receives the set of display pixel data from said rasterop unit and selectively stores the set of display pixel data according to the write enable mask.

Claim 10

A graphics controller for executing a raster operation on a stream of input pixel data, comprising: a plurality of pipelines including at least a first pipeline and a second pipeline for performing a set of operations on the stream of input pixel data to generate a first operand and a second operand, respectively, for the raster operation; a rasterop unit coupled to said plurality of pipelines to receive the first operand and the second operand, for executing the raster operation using the first operand and the second operand to generate a set of display pixel data; an interface to transfer the set of display pixel data to a memory; and a transparency unit for generating a write enable mask, wherein said memory stores the set of display pixel data, wherein said graphics controller generates a set of display signals to a display unit from the set of pixel data stored in said memory, and wherein said memory receives the set of display pixel data from said rasterop unit and selectively stores the set of display pixel data according to the write enable mask.

Claim 11

The graphics controller of claim 8, wherein said transparency unit comprises: a color transparency generator for receiving a set of color pixel data and for generating the write enable mask from the set of color pixel data; and a monochrome transparency generator for receiving a set of monochrome pixel data and for generating the write enable mask from the set of monochrome pixel data.

Claim 12

The graphics controller of claim 9, wherein said monochrome transparency generator comprises: an invertor for generating a set of inverted monochrome pixel data from the set of monochrome pixel data; a first multiplexor for receiving the set of monochrome pixel data and the set of inverted monochrome pixel data and for selecting as output one of the set of monochrome pixel data and the set of inverted monochrome pixel data under the control of a transparency operation signal, wherein the output comprises the write enable mask for a first set of converted color pixel data, and wherein each of the first set of converted color pixel data corresponds to a monochrome pixel data converted into eight bit per pixel data format; 24 bpp transparency generator for generating a write enable mask for a second set of converted pixel data, wherein each of the second set of converted pixel data corresponds to a monochrome pixel data converted into 24 bits per pixel data format; and a second multiplexor for selectively coupling one of the write enable masks for the first set of converted color pixel data and the second set of color pixel data to said memory.

Claim 13

The graphics controller of claim 9, wherein said color transparency generator comprises: a background color register for storing a background color data for a transparency operation; a bit mask register for storing a mask to mask a subset of the bits in the set of color pixel data while generating the write enable mask; and a write enable mask generator for generating the write enable mask for the set of color pixel data.

Claim 14

The graphics controller of claim 11, wherein the write enable mask generator comprises: a first set of gates for generating a set of masked color pixel data by masking the subset of the bit positions in the set of color pixel data according to the mask; a second set of gates for generating a masked background color data by masking the background color data; and means for comparing each of the set of masked color pixel data with the masked background color data and for generating a first logical value upon a match and a second logical value otherwise, wherein said means for comparing replicates the first logical value and the second logical value for generating the write enable mask.

Claim 15

The graphics controller of claim 9, wherein said color transparency generator generates the write enable mask for the color pixel data in 24 bits per pixel format, and wherein eight color pixel data are packed in three 64-bit words.

Claim 16

A graphics controller for executing a raster operation on a stream of input pixel data, comprising: a plurality of pipelines including at least a first pipeline and a second pipeline for performing a set of operations on the stream of input pixel data to generate a first operand and a second operand, respectively, for the raster operation; a rasterop unit coupled to said plurality of pipelines to receive the first operand and the second operand, for executing the raster operation using the first operand and the second operand to generate a set of display pixel data; an interface to transfer the set of display pixel data to a memory; a third pipeline for performing a set of operations on the stream of input pixel data to generate a third operand for the raster operation; a pixel FIFO for receiving the set of pixel data from said rasterop unit; and a third multiplexor for receiving the set of input pixel data from a host or said memory or said pixel FIFO and selectively forwarding the set of pixel data to one of said plurality of pipelines, wherein said memory stores the set of display pixel data, wherein said graphics controller generates a set of display signals to a display unit from the set of pixel data stored in said memory, and wherein said interface transfers the set of pixel data from said pixel FIFO to said memory.

Claim 17

A graphics controller for executing a raster operation on a stream of input pixel data, comprising: a plurality of pipelines including at least a first pipeline and a second pipeline for performing a set of operations on the stream of input pixel data to generate a first operand and a second operand, respectively, for the raster operation; a rasterop unit coupled to said plurality of pipelines to receive the first operand and the second operand, for executing the raster operation using the first operand and the second operand to generate a set of display pixel data; an interface to transfer the set of display pixel data to a memory; a third pipeline for performing a set of operations on the stream of input pixel data to generate a third operand for the raster operation; a pixel FIFO for receiving the set of pixel data from said rasterop unit; and a third multiplexor for receiving the set of input pixel data from a host or said memory or said pixel FIFO and selectively forwarding the set of pixel data to one of said plurality of pipelines, wherein said memory stores the set of display pixel data, wherein said graphics controller generates a set of display signals to a display unit from the set of pixel data stored in said memory, and wherein said interface transfers the set of pixel data from said pixel FIFO to said memory.

Claim 18

The graphics controller of claim 14, wherein said first pipeline and said second pipeline comprise: a memory interface for receiving the set of pixel data; a converter for converting the set of pixel data to a set of color pixel data if the set of pixel data comprise monochrome pixel data; a barrel shifter for rotating the set of pixel data within a word to generate a set of rotated data words; and an operand storage unit coupled to said convertor and said barrel shifter for receiving the set of color pixel data and the set of rotated data words.

Claim 19

A computer system for displaying an image corresponding to a stream of input display data, comprising: a display unit for displaying the image; a display memory for storing a set of display pixel data; a graphics controller for receiving the stream of input display data and generating the set of display pixel data, the graphics controller storing the set of display pixel data in said display memory and generating display signals to said display unit to display the image, said graphics controller further comprising: a plurality of pipelines comprising at least a first pipeline and a second pipeline for performing a set of operations on the stream of input pixel data to generate a first operand and a second operand, respectively, for a raster operation; and a rasterop unit coupled to the plurality of pipelines to receive the first operand and the second operand, for executing the raster operation using the first operand and the second operand to generate the set of display pixel data, wherein said first pipeline and said second pipeline comprise: a memory interface for receiving the set of pixel data; a converter for converting the set of pixel data to a set of color pixel data if the set of pixel data comprise monochrome pixel data; a barrel shifter for rotating the set of pixel data within a word to generate a set of rotated data words; and an operand storage unit coupled to said convertor and said barrel shifter for receiving the set of color pixel data and the set of rotated data words.

Claim 20

A computer system for displaying an image corresponding to a stream of input display data, comprising: a display unit for displaying the image; a display memory for storing a set of display pixel data; a graphics controller for receiving the stream of input display data and generating the set of display pixel data, the graphics controller storing the set of display pixel data in said display memory and generating display signals to said display unit to display the image, said graphics controller further comprising: a plurality of pipelines comprising at least a first pipeline and a second pipeline for performing a set of operations on the stream of input pixel data to generate a first operand and a second operand, respectively, for a raster operation; and a rasterop unit coupled to the plurality of pipelines to receive the first operand and the second operand, for executing the raster operation using the first operand and the second operand to generate the set of display pixel data, wherein said first pipeline and said second pipeline comprise: a memory interface for receiving the set of pixel data; a converter for converting the set of pixel data to a set of color pixel data if the set of pixel data comprise monochrome pixel data; a barrel shifter for rotating the set of pixel data within a word to generate a set of rotated data words; and an operand storage unit coupled to said convertor and said barrel shifter for receiving the set of color pixel data and the set of rotated data words.

Claim 21

The computer system of claim 16, wherein said plurality of pipelines further comprises: a third pipeline for performing a set of operations on the stream of input pixel data to generate a third operand for the raster operation.

Claim 22

The computer system of claim 17, further comprising: an interpolation unit for interpolating the stream of input pixel data to generate pixel data corresponding to an upscaled video image.

Claim 23

The computer system of claim 18, wherein said interpolation unit provides pixel data corresponding to the upscaled video image as the second operand to said rasterop unit.

Claim 24

The computer system of claim 17, further comprising: a pixel FIFO for receiving the set of pixel data from said rasterop unit, wherein said interface transfers the set of pixel data from said pixel FIFO to said memory.

Claim 25

A computer system for displaying an image corresponding to a stream of input display data, comprising: a display unit for displaying the image; a display memory for storing a set of display pixel data; a graphics controller for receiving the stream of input display data and generating the set of display pixel data, the graphics controller storing the set of display pixel data in said display memory and generating display signals to said display unit to display the image, said graphics controller further comprising: a plurality of pipelines comprising at least a first pipeline and a second pipeline for performing a set of operations on the stream of input pixel data to generate a first operand and a second operand, respectively, for a raster operation; a rasterop unit coupled to the plurality of pipelines to receive the first operand and the second operand, for executing the raster operation using the first operand and the second operand to generate the set of display pixel data; and a transparency unit for generating a write enable mask, wherein said memory receives the set of display pixel data from said rasterop unit and selectively stores the set of display pixel data according to the write enable mask.

Claim 26

A computer system for displaying an image corresponding to a stream of input display data, comprising: a display unit for displaying the image; a display memory for storing a set of display pixel data; a graphics controller for receiving the stream of input display data and generating the set of display pixel data, the graphics controller storing the set of display pixel data in said display memory and generating display signals to said display unit to display the image, said graphics controller further comprising: a plurality of pipelines comprising at least a first pipeline and a second pipeline for performing a set of operations on the stream of input pixel data to generate a first operand and a second operand, respectively, for a raster operation; a rasterop unit coupled to the plurality of pipelines to receive the first operand and the second operand, for executing the raster operation using the first operand and the second operand to generate the set of display pixel data; and a transparency unit for generating a write enable mask, wherein said memory receives the set of display pixel data from said rasterop unit and selectively stores the set of display pixel data according to the write enable mask.

Claim 27

The computer system of claim 21, wherein said transparency unit comprises: a color transparency generator for receiving a set of color pixel data and for generating the write enable mask from the set of color pixel data; and a monochrome transparency generator for receiving a set of monochrome pixel data and for generating the write enable mask from the set of monochrome pixel data.

Claim 28

The computer system of claim 22, wherein said color transparency generator comprises: a background color register for storing a background color data for a transparency operation; a bit mask register for storing a mask to mask a subset of the bits in the set of color pixel data while generating the write enable mask; and a write enable mask generator for generating the write enable mask for the set of color pixel data.

Claim 29

The computer system of claim 23, wherein the write enable mask generator comprises: a first set of gates for generating a set of masked color pixel data by masking the subset of the bit positions in the set of color pixel data according to the mask; a second set of gates for generating a masked background color data by masking the background color data; and means for comparing each of the set of masked color pixel data with the masked background color data and for generating a first logical value upon a match and a second logical value otherwise, wherein said means for comparing replicates the first logical value and the second logical value for generating the write enable mask.

Claim 30

The computer system of claim 21, wherein said monochrome transparency generator comprises: an invertor for generating a set of inverted monochrome pixel data from the set of monochrome pixel data; a first multiplexor for receiving the set of monochrome pixel data and the set of inverted monochrome pixel data and for selecting as output one of the set of monochrome pixel data and the set of inverted monochrome pixel data under the control of a transparency operation signal, wherein the output comprises the write enable mask for a first set of converted color pixel data, and wherein each of the first set of converted color pixel data corresponds to a monochrome pixel data converted into eight bit per pixel data format; 24 bpp transparency generator for generating a write enable mask for a second set of converted pixel data, wherein each of the second set of converted pixel data corresponds to a monochrome pixel data converted into 24 bits per pixel data format; and a second multiplexor for selectively coupling one of the write enable mask for the first set of converted color pixel data or the second set of color pixel data to said memory.

Claim 31

A computer system for displaying an image corresponding to a stream of input display data, comprising: a display unit for displaying the image; a display memory for storing a set of display pixel data; a graphics controller for receiving the stream of input display data and generating the set of display pixel data, the graphics controller storing the set of display pixel data in said display memory and generating display signals to said display unit to display the image, said graphics controller further comprising: a plurality of pipelines comprising at least a first pipeline and a second pipeline for performing a set of operations on the stream of input pixel data to generate a first operand and a second operand, respectively, for a raster operation, wherein said plurality of pipelines further comprises a third pipeline for performing a set of operations on the stream of input pixel data to generate a third operand for the raster operation; a rasterop unit coupled to the plurality of pipelines to receive the first operand and the second operand, for executing the raster operation using the first operand and the second operand to generate the set of display pixel data; a pixel FIFO for receiving the set of pixel data from said rasterop unit; and a third multiplexor for receiving the set of input pixel data from a host or said memory or said pixel FIFO and selectively forwarding the set of pixel data to one of said plurality of pipelines, wherein said interface transfers the set of pixel data from said pixel FIFO to said memory.

Claim 32

A computer system for displaying an image corresponding to a stream of input display data, comprising: a display unit for displaying the image; a display memory for storing a set of display pixel data; a graphics controller for receiving the stream of input display data and generating the set of display pixel data, the graphics controller storing the set of display pixel data in said display memory and generating display signals to said display unit to display the image, said graphics controller further comprising: a plurality of pipelines comprising at least a first pipeline and a second pipeline for performing a set of operations on the stream of input pixel data to generate a first operand and a second operand, respectively, for a raster operation, wherein said plurality of pipelines further comprises a third pipeline for performing a set of operations on the stream of input pixel data to generate a third operand for the raster operation; a rasterop unit coupled to the plurality of pipelines to receive the first operand and the second operand, for executing the raster operation using the first operand and the second operand to generate the set of display pixel data; a pixel FIFO for receiving the set of pixel data from said rasterop unit; and a third multiplexor for receiving the set of input pixel data from a host or said memory or said pixel FIFO and selectively forwarding the set of pixel data to one of said plurality of pipelines, wherein said interface transfers the set of pixel data from said pixel FIFO to said memory.

Claim 33

The computer system of claim 26, wherein said first pipeline and said second pipeline comprise: a memory interface for receiving the set of pixel data; a converter for converting the set of pixel data to a set of color pixel data if the set of pixel data comprise monochrome pixel data; a barrel shifter for rotating the set of pixel data within a word to generate a set of rotated data words; and an operand storage unit coupled to said convertor and said barrel shifter for receiving the set of color pixel data and the set of rotated data words.

Claim 36

The method of claim 28, further comprising the step of: storing the set of display pixel data in a memory, wherein said step of generating display signals further comprises the step of: generating a display signal from the set of display pixel data stored in the memory.