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Low defect density composite dielectric

Assignee: Texas Instruments Inc
•
Filing: 1997-11-19
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Granted: 1999-10-19
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Expires: 2017-11-19
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Abstract

Abstract A composite dielectric layer (102). A first layer (112) of the composite dielectric layer (102) has a small to no nitrogen concentration. A second layer (114) of the composite dielectric layer (102) has a larger nitrogen concentration (e.g., 5-15%). The composite dielectric layer (102) may be used as a thin gate dielectric wherein the second layer (114) is located adjacent a doped gate electrode (110) and has sufficient nitrogen concentration to stop penetration of dopant from the gate electrode (110) to the channel region (108). The first layer (112) is located between the second layer (114) and the channel region (108). The low nitrogen concentration of the first layer (112) is limited so as to not interfere with carrier mobility in the channel region (108).

Inventors

  • 👤 Douglas Ticknor Grider, III
  • 👤 Paul Edward Nicollian
  • 👤 Steve Hsia

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 08:12
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0144; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01332; H10D64/01336; H10D64/0134; H10D64/01344; H10D64/60; H10D64/66; H10D64/68; H10D64/681; H10D64/685; H10D64/693; H10P; H10P14/00; H10P14/60; H10P14/66; H10P14/662

Claims Analysis

Total Claims: 18
Claim 1
Independent Claim 45 words
A composite dielectric layer comprising: a first dielectric layer having a nitrogen content less than 1%; and a second dielectric layer having a nitrogen content sufficient to block penetration of dopants; wherein said second dielectric layer has a thickness on the order of 10-20 Å.
Claim 2
Dependent Claim 45 words
A composite dielectric layer comprising: a first dielectric layer having a nitrogen content less than 1%; and a second dielectric layer having a nitrogen content sufficient to block penetration of dopants; wherein said second dielectric layer has a thickness on the order of 10-20 Å.
Claim 3
Dependent Claim 32 words
The composite dielectric layer of claim 1, wherein said first dielectric layer is located adjacent a channel region of a transistor and said second dielectric layer is spaced from said channel region.
Claim 4
Dependent Claim 15 words
The composite dielectric layer of claim 1, wherein said first dielectric layer comprises silicon dioxide.
Claim 5
Dependent Claim 16 words
The composite dielectric layer of claim 1, wherein said second dielectric layer comprises a nitrogen-doped oxide.
Claim 6
Dependent Claim 15 words
The composite dielectric layer of claim 1, wherein said second dielectric layer comprises an oxynitride.
Claim 7
Dependent Claim 21 words
The composite dielectric layer of claim 1, wherein said first dielectric layer has a thickness on the order of 15-25 Å.
Claim 8
Dependent Claim 21 words
The composite dielectric layer of claim 1, wherein said second dielectric layer has a nitrogen concentration in the range of 5-15%.
Claim 9
Dependent Claim 41 words
The composite dielectric layer of claim 1, wherein said first dielectric layer is located between a first polysilicon layer and said second dielectric layer and said second dielectric layer is located between said first dielectric layer and a second polysilicon layer.
Claim 10
Dependent Claim 26 words
The composite dielectric layer of claim 1, wherein said first dielectric layer and second dielectric layer are located between first and second plates of a capacitor.
Claim 11
Dependent Claim 128 words
A MOSFET transistor, comprising: a source region located in a semiconductor body; a drain region located in said semiconductor body; a channel region located between said source region and said drain region in said semiconductor body; a doped gate electrode disposed over said channel region; and a gate dielectric disposed between said doped gate electrode and said channel region, said gate dielectric comprising: a first layer located adjacent said channel region and having a sufficiently small nitrogen concentration such that carrier mobility in said channel region is not influenced; and a second layer located adjacent said gate electrode and having a nitrogen concentration sufficient to block the penetration of dopants from said doped gate electrode, wherein said second layer has a thickness on the order of 10-20 Å.
Claim 12
Dependent Claim 128 words
A MOSFET transistor, comprising: a source region located in a semiconductor body; a drain region located in said semiconductor body; a channel region located between said source region and said drain region in said semiconductor body; a doped gate electrode disposed over said channel region; and a gate dielectric disposed between said doped gate electrode and said channel region, said gate dielectric comprising: a first layer located adjacent said channel region and having a sufficiently small nitrogen concentration such that carrier mobility in said channel region is not influenced; and a second layer located adjacent said gate electrode and having a nitrogen concentration sufficient to block the penetration of dopants from said doped gate electrode, wherein said second layer has a thickness on the order of 10-20 Å.
Claim 13
Dependent Claim 17 words
The transistor of claim 10, wherein said first layer contains a nitrogen concentration between 0 and 1%.
Claim 14
Dependent Claim 17 words
The transistor of claim 10, wherein said second layer has a nitrogen concentration between 5 and 15%.
Claim 15
Dependent Claim 14 words
The transistor of claim 10, wherein said doped gate electrode is doped with boron.
Claim 16
Dependent Claim 12 words
The transistor of claim 10, wherein said first layer comprises silicon dioxide.
Claim 17
Dependent Claim 13 words
The transistor of claim 10, wherein said second layer comprises a nitrogen-doped oxide.
Claim 18
Dependent Claim 12 words
The transistor of claim 10, wherein said second layer comprises an oxynitride.

References Cited (Backward Citations)

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WO1986003621A1 Cited
EP0187278A2 Cited
US5037772A Cited
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EP0617461A2 Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-10-18 2003-04-19 2003-10-19 $2000.00 Window Closed / Lapsed
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