US6044031A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Programmable bit line drive modes for memory arrays
Assignee: Marvell International Ltd
•
Filing: 1998-11-12
•
Granted: 2000-03-28
•
Expires: 2018-11-12
Abstract
Abstract A field programmable memory array having a plurality of sub-arrays is provided. Programmable address decoders, programmable hierarchical bit line arrangements, programmable I/O arrangements, among other features, are provided to enable programming of portions of the array into selected modes. The modes may include wide memory, deep memory, FIFO, LIFO, among others. An embodiment of the invention is disclosed wherein the field programmable memory array is integrated with the programmable resources of a field programmable gate array.
Inventors
- 👤 Joseph Andrew Iadanza
- 👤 Frank Ray Keyser, III
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 23:29
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/76; G06F7/78; G06F7/785; G06F5/00; G06F5/06; G06F5/10; G11; G11C; G11C7/00; G11C7/10; G11C7/1006; G11C7/1015; G11C7/1045; G11C7/1051; G11C7/1078; G11C7/12; G11C8/00; H; H03; H03K; H03K19/00; H03K19/02; H03K19/173; H03K19/177; H03K19/17704; H03K19/17748; H03K19/1776
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
108 words
A programmable memory array, comprising: at least one sub-array having a plurality of memory cells; a line for propagating memory cell data away from the cells of the at least one sub-array; a precharge device programmably connectable to the line; and a drive device connected to the line and programmably operable via configuration data independent of data in said memory cells and memory cell access signals, the drive device programmably operable in a first mode wherein discharge of the said line in accordance with the memory cell data is effected, and a second mode wherein drive of said line in accordance with the memory cell data is effected.
Claim 2
Dependent Claim
108 words
A programmable memory array, comprising: at least one sub-array having a plurality of memory cells; a line for propagating memory cell data away from the cells of the at least one sub-array; a precharge device programmably connectable to the line; and a drive device connected to the line and programmably operable via configuration data independent of data in said memory cells and memory cell access signals, the drive device programmably operable in a first mode wherein discharge of the said line in accordance with the memory cell data is effected, and a second mode wherein drive of said line in accordance with the memory cell data is effected.
Claim 3
Dependent Claim
29 words
The programmable memory array of claim 1, wherein the precharge device is connected to the line in the first mode and disconnected from the line in the second mode.
Claim 4
Dependent Claim
23 words
The programmable memory array of claim 2, wherein the first mode comprises synchronous sub-array operation and the second mode compromises asynchronous sub-array operation.
Claim 5
Dependent Claim
27 words
The programmable memory array of claim 1, wherein the drive device is programmably operable in a third mode wherein a high impedance is provided to the line.
References Cited (Backward Citations)
US4435775A
Cited
US4430712A
Cited
US4694433A
Cited
US4636990A
Cited
US4775942A
Cited
US5121355A
Cited
US4856106A
Cited
US4969148A
Cited
US5278956A
Cited
US5117389A
Cited
US5341382A
Cited
US5469003A
Cited
US5434406A
Cited
US5426378A
Cited
US5583822A
Cited
US5465056A
Cited
US5652726A
Cited
US5615168A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-03-28 | 2003-09-27 | 2004-03-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-03-28 | 2007-09-27 | 2008-03-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-03-28 | 2011-09-27 | 2012-03-28 | $7700.00 | Window Closed / Lapsed |