US6147876A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Multi-chip module having printed wiring board comprising circuit pattern for IC chip
Assignee: Toshiba Corp
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Filing: 1994-09-14
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Granted: 2000-11-14
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Expires: 2014-09-14
Abstract
Abstract Bare IC chips (201 through 203) are mounted on respective areas (101 through 103) of a printed wiring board (100). The outer electrode pads (105) on the peripheries of the board (100) are soldered to another printed wiring board (1) such as a mother board. Lead pads (107) and the outer electrode pads (105) are interconnected through a circuit pattern (109), through holes (111) and interstitial via holes (112). The circuit pattern (109) is disposed on a die bonding surface of the bare IC chips (201 and 202) for which insulation is not necessary. A multi-chip module is thus completed.
Inventors
- 👤 Masayoshi Yamaguchi
- 👤 Mitsutoshi Sawano
- 👤 Kazutoshi Hohki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 10:07
CPC Classifications
H; H10; H10W; H10W90/00; H05; H05K; H05K1/00; H05K1/02; H05K1/14; H05K1/141; H10W70/00; H10W70/60; H10W70/611; H10W76/00; H10W76/40; H10W76/42; H10W76/47; H10W90/401; H05K1/147; H05K2201/00; H05K2201/09; H05K2201/09145; H05K2201/09181; H05K2201/09209; H05K2201/095; H05K2201/09536; H05K3/00; H05K3/30; H05K3/32; H05K3/34; H05K3/341; H05K3/3431; H05K3/3442; H05K3/36; H05K3/368; H05K3/46; H05K3/4611; H05K3/4614; H05K3/4623; H10W72/00; H10W72/50; H10W72/541; H10W72/5445; H10W72/90; H10W72/931; H10W72/932; H10W90/701; H10W90/751; H10W90/754
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
117 words
A multi-chip module which comprises a printed wiring board and a plurality of bare IC chips mounted on a predetermined area of the printed wiring board, the multi-chip module being mounted on a main printed wiring board, wherein: the printed wiring board has a multilayer structure including a plurality of inner layers; and the multi-chip module further comprises: a first resistor element both ends of which are electrically connected to a conductive pattern provided on one of the inner layers; and a second printed resistor element printed on an area other than the predetermined area of the printed wiring board for adjusting a characteristic of the resistors provided in the multi-chip module including the first resistor element.
Claim 2
Dependent Claim
117 words
A multi-chip module which comprises a printed wiring board and a plurality of bare IC chips mounted on a predetermined area of the printed wiring board, the multi-chip module being mounted on a main printed wiring board, wherein: the printed wiring board has a multilayer structure including a plurality of inner layers; and the multi-chip module further comprises: a first resistor element both ends of which are electrically connected to a conductive pattern provided on one of the inner layers; and a second printed resistor element printed on an area other than the predetermined area of the printed wiring board for adjusting a characteristic of the resistors provided in the multi-chip module including the first resistor element.
Claim 3
Dependent Claim
130 words
A multi-chip module which comprises a printed wiring board and a plurality of bare IC chips mounted on a predetermined area of the printed wiring board, the multi-chip module being mounted on a main printed wiring board, wherein: the printed wiring board has a multilayer structure including a plurality of inner layers; and the multi-chip module further comprises: a first dielectric element both sides of which are electrically connected to a conductive pattern provided on one of the inner layers so that a formed capacitor is formed by the dielectric element and the conductive pattern; and a second dielectric element printed on an area other than the predetermined area of the printed wiring board for adjusting a characteristic of the capacitors provided in the multi-chip module including the formed capacitor.
Claim 4
Dependent Claim
130 words
A multi-chip module which comprises a printed wiring board and a plurality of bare IC chips mounted on a predetermined area of the printed wiring board, the multi-chip module being mounted on a main printed wiring board, wherein: the printed wiring board has a multilayer structure including a plurality of inner layers; and the multi-chip module further comprises: a first dielectric element both sides of which are electrically connected to a conductive pattern provided on one of the inner layers so that a formed capacitor is formed by the dielectric element and the conductive pattern; and a second dielectric element printed on an area other than the predetermined area of the printed wiring board for adjusting a characteristic of the capacitors provided in the multi-chip module including the formed capacitor.
Claim 5
Dependent Claim
188 words
A multi-chip module which comprises a printed wiring board and a plurality of bare IC chips mounted on a predetermined area of the printed wiring board, the multi-chip module being mounted on a main printed wiring board, wherein: the printed wiring board has a multilayer structure including a plurality of inner layers; and the multi-chip module further comprises: a first resistor element both ends of which are electrically connected to a conductive pattern provided on one of the inner layers; a first dielectric element both sides of which are electrically connected to a conductive pattern provided on one of the inner layers so that a formed capacitor is formed by the dielectric element and the conductive pattern; a second printed resistor element printed on an area other than the predetermined area of the printed wiring board for adjusting a characteristic of the resistors provided in the multi-chip module including the first resistor element, and a second dielectric element printed on an area other than the predetermined area of the printed wiring board for adjusting a characteristic of the capacitors provided in the multi-chip module including the formed capacitor.
Claim 6
Dependent Claim
188 words
A multi-chip module which comprises a printed wiring board and a plurality of bare IC chips mounted on a predetermined area of the printed wiring board, the multi-chip module being mounted on a main printed wiring board, wherein: the printed wiring board has a multilayer structure including a plurality of inner layers; and the multi-chip module further comprises: a first resistor element both ends of which are electrically connected to a conductive pattern provided on one of the inner layers; a first dielectric element both sides of which are electrically connected to a conductive pattern provided on one of the inner layers so that a formed capacitor is formed by the dielectric element and the conductive pattern; a second printed resistor element printed on an area other than the predetermined area of the printed wiring board for adjusting a characteristic of the resistors provided in the multi-chip module including the first resistor element, and a second dielectric element printed on an area other than the predetermined area of the printed wiring board for adjusting a characteristic of the capacitors provided in the multi-chip module including the formed capacitor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-11-14 | 2004-05-15 | 2004-11-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-11-14 | 2008-05-15 | 2008-11-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-11-14 | 2012-05-15 | 2012-11-14 | $7700.00 | Window Closed / Lapsed |