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US6584032B2 Expired / Lapsed US ⏱️ 0.0 years remaining

Dynamic random access memory having a low power consumption mode, and method of operating the same

Assignee: Socionext Inc
•
Filing: 2001-09-12
•
Granted: 2003-06-24
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Expires: 2021-09-12
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Abstract

Abstract An internal voltage generator when activated, generates an internal voltage to be supplied to an internal circuit. Operating the internal voltage generator consumes a predetermined amount of the power. In response to a control signal from the exterior, an entry circuit inactivates the internal voltage generator. When the internal voltage generator is inactivated, the internal voltage is not generated, thereby reducing the power consumption. By the control signal from the exterior, therefore, a chip can easily enter a low power consumption mode. The internal voltage generator is exemplified by a booster for generating the boost voltage of a word line connected with memory cells, a substrate voltage generator for generating a substrate voltage, or a precharging voltage generator for generating the precharging voltage of bit lines to be connected with the memory cells.

Inventors

  • 👤 Shinya Fujioka
  • 👤 Tomohiro Kawakubo
  • 👤 Koichi Nishimura
  • 👤 Kotoku Sato

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 04:01
CPC Classifications
G; G06; G06F; G06F1/00; G06F1/26; G06F1/32; G06F1/3203; G06F1/3234; G06F1/325; G06F1/3268; G06F1/3275; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/406; G11C11/40615; G11C14/00; G11C5/00; G11C5/14; G11C5/145; G11C5/147; H; H02; H02M; H02M3/00; H02M3/02; H02M3/04; H02M3/06; H02M3/07; G11C2207/00; G11C2207/22; G11C2207/2227; G11C2211/00; G11C2211/401; G11C2211/406; G11C2211/4067; Y; Y02; Y02D; Y02D10/00; Y02D30/00; Y02D30/50

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 75 words
A method of operating a dynamic random access memory including dynamic memory cells, the memory having a low power consumption mode, in which the dynamic memory cells do not retain data therein by prohibiting refresh operations, and an idle mode, comprising the steps of: entering the idle mode; and entering the low power consumption mode in response to an external command which comprises a combination of a plurality of control signals during the idle mode.
Claim 2
Independent Claim 75 words
A method of operating a dynamic random access memory including dynamic memory cells, the memory having a low power consumption mode, in which the dynamic memory cells do not retain data therein by prohibiting refresh operations, and an idle mode, comprising the steps of: entering the idle mode; and entering the low power consumption mode in response to an external command which comprises a combination of a plurality of control signals during the idle mode.
Claim 3
Dependent Claim 32 words
The method of operating the dynamic random access memory according to claim 1 , further comprising the step of exiting from the low power consumption mode in response to a second command.
Claim 4
Dependent Claim 28 words
The method of operating the dynamic random access memory according to claim 2 , wherein the memory is initialized after the exit from the low power consumption mode.

References Cited (Backward Citations)

US5410507A Cited
US5341340A Cited
US5461338A Cited
US5554953A Cited
US5570005A Cited
US6025707A Cited
US6150860A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2006-06-23 2006-12-23 2007-06-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2010-06-23 2010-12-23 2011-06-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2014-06-23 2014-12-23 2015-06-24 $7700.00 Window Closed / Lapsed

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