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US6671204B2 Expired / Lapsed US ⏱️ 0.0 years remaining

Nonvolatile memory device with page buffer having dual registers and methods of using the same

Assignee: Samsung Electronics Co Ltd
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Filing: 2001-12-07
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Granted: 2003-12-30
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Expires: 2021-12-07
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Abstract

Abstract A memory device has an array of memory cells to store data, and a Y-gating circuit to gate data stored in a group of the memory cells. A page buffer is coupled between the memory cell array and the Y-gating circuit. The page buffer includes a dual register corresponding to each memory cell of the group. The dual register includes a first register and an associated second register. The first and second registers are adapted to exchange data with each other, with cells of the memory cell array, and with the Y-gating circuit.

Inventors

  • 👤 Heung-Soo Im

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 09:54
CPC Classifications
G; G11; G11C; G11C7/00; G11C7/10; G11C7/1078; G11C7/1093; G11C16/00; G11C16/02; G11C16/04; G11C16/06; G11C16/10; G11C7/1015; G11C7/1039; G11C7/1051; G11C7/1087; G11C2216/00; G11C2216/12; G11C2216/14

Claims Analysis

Total Claims: 26
Claim 1
Independent Claim 111 words
A nonvolatile memory cell device comprising: an array of memory cells to store data; a Y-gating circuit to gate data stored in a group of the memory cells; and a page buffer coupled between the memory cell array and the Y-gating circuit through a sense node, the page buffer including a first register and an associated second register corresponding to each memory cell of the group, in which the sense node is commonly coupled to the first register and second register, in which the first register is adapted to write data to a memory cell while the associated second register is adapted to concurrently store external data through the Y-gating circuit.
Claim 2
Dependent Claim 111 words
A nonvolatile memory cell device comprising: an array of memory cells to store data; a Y-gating circuit to gate data stored in a group of the memory cells; and a page buffer coupled between the memory cell array and the Y-gating circuit through a sense node, the page buffer including a first register and an associated second register corresponding to each memory cell of the group, in which the sense node is commonly coupled to the first register and second register, in which the first register is adapted to write data to a memory cell while the associated second register is adapted to concurrently store external data through the Y-gating circuit.
Claim 3
Dependent Claim 21 words
The device of claim 1 , further comprising: an isolation switch to selectively isolate the first register from the second register.
Claim 4
Dependent Claim 32 words
The device of claim 1 , in which each one of the first and the second registers includes a latch to store the data, and a precharge circuit to precharge the latch.
Claim 5
Dependent Claim 18 words
The device of claim 3 , further comprising: a transistor to couple the latch to the Y-gating circuit.
Claim 6
Dependent Claim 39 words
The device of claim 1 , further comprising: a plurality of bitlines to transfer data between the memory cell array and the page buffer, in which two of the bitlines terminate in the sense node of the page buffer.
Claim 7
Dependent Claim 24 words
The device of claim 5 , in which the second register is adapted to transfer data to the first register through the sense node.
Claim 8
Dependent Claim 20 words
The device of claim 4 , further comprising: a second transistor to selectively couple the sense node to the latch.
Claim 9
Dependent Claim 66 words
A program method for a nonvolatile memory device comprising: passing first external data through a Y-gating circuit; then storing the first data at a first register of a page buffer; then storing the first data at a second register of the page buffer through a sense node; and then storing the first data at a first cell of a memory cell array through the sense node.
Claim 10
Dependent Claim 66 words
A program method for a nonvolatile memory device comprising: passing first external data through a Y-gating circuit; then storing the first data at a first register of a page buffer; then storing the first data at a second register of the page buffer through a sense node; and then storing the first data at a first cell of a memory cell array through the sense node.
Claim 11
Dependent Claim 18 words
The method of claim 8 , in which the first external data is a whole page of data.
Claim 12
Dependent Claim 31 words
The method of claim 8 , further comprising: activating an isolation switch to connect the first register with the second register prior to storing the first data in the second register.
Claim 13
Dependent Claim 21 words
The method of claim 8 , in which the Y-gating circuit permits to pass the first external data by byte unit.
Claim 14
Dependent Claim 14 words
The method of claim 11 , in which the byte unit is eight bits.
Claim 15
Dependent Claim 28 words
The method of claim 8 , in which the first data is stored from the first register to the second register of the page buffer by page unit.
Claim 16
Dependent Claim 29 words
The method of claim 8 , in which the first data is stored from the second register to the first cell of the memory cell array by page unit.
Claim 17
Dependent Claim 28 words
The method of claim 8 , further comprising: receiving and storing second external data in the first register concurrently with storing the first data at the first cell.
Claim 18
Dependent Claim 21 words
The method of claim 15 , further comprising: activating an isolation switch to isolate the first register from the second register.
Claim 19
Dependent Claim 48 words
The method of claim 15 , further comprising: storing the second data in a second cell of the array, in which the first cell is coupled with the first register through a first bitline, and the second cell is coupled with the first register through a second bitline.
Claim 20
Dependent Claim 54 words
A program method for a nonvolatile memory device comprising: storing data of a first cell in a memory cell array in a first register of a page buffer; then storing the data in a second register of the page buffer; and then storing the data in a second cell of the memory cell array.
Claim 21
Dependent Claim 54 words
A program method for a nonvolatile memory device comprising: storing data of a first cell in a memory cell array in a first register of a page buffer; then storing the data in a second register of the page buffer; and then storing the data in a second cell of the memory cell array.
Claim 22
Dependent Claim 21 words
The method of claim 18 , further comprising: activating an isolation switch to connect the first register with the second register.
Claim 23
Dependent Claim 30 words
The method of claim 18 , in which the data is stored in the second memory cell without being inverted from how it was stored in the first memory cell.
Claim 24
Dependent Claim 58 words
A pass/fail checking method for a nonvolatile memory device comprising: dumping data of a first memory cell to a first register of a page buffer circuit through a sense node; dumping data stored in the first register of the page buffer circuit to a second register through the sense node; and checking the data in the second register.
Claim 25
Dependent Claim 58 words
A pass/fail checking method for a nonvolatile memory device comprising: dumping data of a first memory cell to a first register of a page buffer circuit through a sense node; dumping data stored in the first register of the page buffer circuit to a second register through the sense node; and checking the data in the second register.
Claim 26
Dependent Claim 21 words
The method of claim 21 , further comprising: activating an isolation switch to connect the first register with the second register.

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2006-12-29 2007-06-30 2007-12-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2010-12-29 2011-06-30 2011-12-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2014-12-29 2015-06-30 2015-12-30 $7700.00 Window Closed / Lapsed

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