NAND stack EEPROM with random programming capability

Claim 1

A NAND stack electrically erasable programmable read-only memory device (EEPROM) comprising: a bit line for transferring a bit of data to and from an exterior environment; a ground line; a NAND stack having a first end that is operatively connected to said bit line, a second end that is operatively connected to said ground line, a plurality of series-connected non-volatile memory cells located between said first end and said second end; and a controller having an interface for communicating with said plurality of series-connected non-volatile memory cells and capable of issuing signals to said plurality of series-connected non-volatile memory cells to cause said plurality of series-connected non-volatile memory cells to be programmed with bits of data in any order; wherein said controller is capable of issuing signals that have a program voltage level which is suitable for programming the threshold level of each one of said plurality of series-connected non-volatile memory cells, wherein said controller, when in operation, only issues signals having said program voltage level to one of said plurality of series connected non-volatile memory cells at a time.