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US4897364A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for locos isolation using a framed oxidation mask and a polysilicon buffer layer

Assignee: Motorola Solutions Inc
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Filing: 1989-02-27
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Granted: 1990-01-30
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Expires: 2009-02-27
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Abstract

Abstract An improved LOCOS device isolation method for forming a field oxide is disclosed having the advantage of controllable and uniform sidewall framing of a nutride oxidation mask. This advantage is achieved by the use of a polysilicon layer overlying a nitride mask with the polysilicon providing an etching endpoint during the anisotropic etching used for sidewall formation. In one embodiment of the invention a silicon substrate is provided having a pad oxide formed on its surface and a first polysilicon stress-relief buffer layer formed overlying the pad oxide. A first nitride layer, to be used for oxidation masking during field oxide growth, is deposited overlying the first polysilicon layer. Next, a second polysilicon, etch-resistant buffer layer is deposited overlying the first nitride layer. The first nitride layer and second polysilicon layer are patterned by conventional lithography while the first polysilicon and pad oxide layers remained unpatterned. A second nitride layer is deposited overlying the patterned second polysilicon layer and exposed regions of the first polysilicon layer. Sidewalls are formed on the edges of the patterned first nitride and second polysilicon layers by anisotropically etching the second nitride layer using the first and second polysilicon layers as etching endpoints. Finally, the field oxide is grown by conventional methods. The grown field oxide exhibits reduced bird's beak length, and the resulting field separation is not limited by optical lithography resolution.

Inventors

  • 👤 Bich-Yen Nguyen
  • 👤 Philip J. Tobin
  • 👤 Shih-Wei Sun
  • 👤 Michael Woo

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 06:45
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10P14/61; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/0125; H10W10/0126; H10W10/10; H10W10/13

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 95 words
A method for fabricating a semiconductor device comprising the steps of: providing semiconductor substrate; forming a buffer layer comprising sequential layers of silicon oxide and polycrystalline silicon overlying said substrate; depositing an oxidation masking layer overlying said buffer layer; depositing a second layer of polycrystalline silicon overlying said oxidation masking layer; patterning said oxidation masking layer and said second layer of polycrystalline silicon; depositing a second oxidation masking layer overlying said patterned second layer of polycrystalline silicon and said buffer layer; etching said second oxidation masking layer to form sidewalls; and oxidizing said semiconductor substrate.
Claim 2
Independent Claim 95 words
A method for fabricating a semiconductor device comprising the steps of: providing semiconductor substrate; forming a buffer layer comprising sequential layers of silicon oxide and polycrystalline silicon overlying said substrate; depositing an oxidation masking layer overlying said buffer layer; depositing a second layer of polycrystalline silicon overlying said oxidation masking layer; patterning said oxidation masking layer and said second layer of polycrystalline silicon; depositing a second oxidation masking layer overlying said patterned second layer of polycrystalline silicon and said buffer layer; etching said second oxidation masking layer to form sidewalls; and oxidizing said semiconductor substrate.
Claim 3
Dependent Claim 19 words
The method of claim 1 wherein said step of depositing an oxidation masking layer comprises depositing a nitride layer.
Claim 4
Dependent Claim 19 words
The method of claim 1 wherein said step of depositing second oxidation masking layer comprises depositing a nitride layer.
Claim 5
Dependent Claim 13 words
The method of claim 1 wherein said step of etching comprises anisotropic etching.
Claim 6
Independent Claim 105 words
A device isolation method comprising the steps of: providing a semiconductor substrate; forming an oxide layer overlying said substrate; depositing a first polysilicon layer overlying said oxide layer; depositing an oxidation masking layer overlying said first polysilicon layer; depositing a second polysilicon layer overlying said oxidation masking layer; patterning said oxidation masking layer and said second polysilicon layer to expose a portion of said first polysilicon layer; depositing an etchable, oxidation resistant layer overlying said patterned second polysilicon layer and said exposed first polysilicon layer; etching said etchable, oxidation resistant layer to form sidewalls; implanting said substrate with a dopant; and oxidizing said semiconductor substrate.
Claim 7
Independent Claim 105 words
A device isolation method comprising the steps of: providing a semiconductor substrate; forming an oxide layer overlying said substrate; depositing a first polysilicon layer overlying said oxide layer; depositing an oxidation masking layer overlying said first polysilicon layer; depositing a second polysilicon layer overlying said oxidation masking layer; patterning said oxidation masking layer and said second polysilicon layer to expose a portion of said first polysilicon layer; depositing an etchable, oxidation resistant layer overlying said patterned second polysilicon layer and said exposed first polysilicon layer; etching said etchable, oxidation resistant layer to form sidewalls; implanting said substrate with a dopant; and oxidizing said semiconductor substrate.
Claim 8
Dependent Claim 19 words
The method of claim 5 wherein said step of depositing an oxidation masking layer comprises depositing a nitride layer.
Claim 9
Dependent Claim 20 words
The method of claim 5 wherein said step of depositing an etchable, oxidation resistant layer comprises depositing a nitride layer.
Claim 10
Dependent Claim 13 words
The method of claim 5 wherein said step of etching comprises anisotropic etching.
Claim 11
Dependent Claim 17 words
The method of claim 5 wherein said step of implanting comprises implanting through said first polysilicon layer.
Claim 12
Dependent Claim 16 words
The method of claim 5 wherein said step of implanting comprises implanting through said oxide layer.

References Cited (Backward Citations)

US4376336A Cited
EP0111774A1 Cited
US4407696A Cited
JPS59224141A Cited
EP0146895A2 Cited
US4583281A Cited
US4758530A Cited
US4755477A Cited
US4812418A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-01-29 1993-07-31 1994-01-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-01-29 1997-07-31 1998-01-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-01-29 2001-07-31 2002-01-30 $7700.00 Window Closed / Lapsed

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