Patent US5635869A successfully refreshed from Google Patents.
US5635869A
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Current reference circuit
Assignee: International Business Machines Corp
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Filing: 1995-09-29
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Granted: 1997-06-03
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Expires: 2015-09-29
Abstract
Abstract A constant-current generator circuit includes an output circuit and a control circuit, with the control circuit producing a control voltage to define a reference current through the output circuit. An important feature is that the control circuit uses a pair of transistors having different threshold voltages in generating the control voltage. The circuit is formed using CMOS technology, and the difference in threshold voltage may be produced by doping the polysilicon gate of an N-channel or P-channel field effect transistor. The step of doping to produce the change in threshold voltage is compatible with the standard processing for the CMOS device. In a preferred embodiment, the control circuit uses two pairs of control transistors, each pair having differing thresholds. One pair is P-channel and the other N-channel. These pairs are in parallel, the P-channel pair connected to the positive supply and the N-channel pair to the negative supply or ground. Each pair is connected in a cascode arrangement, producing two control voltages for two symmetrical output transistors in the output circuit, one N-channel and one P-channel.
Inventors
- 👤 Frank D. Ferraiolo
- 👤 John E. Gersbach
- 👤 Ilya J. Novof
- 👤 Edward J. Nowak
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 23:34
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/26; G05F3/262
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
83 words
An integrated circuit, comprising: a) a constant-current circuit for creating a reference current; and b) a current control circuit connected to said constant-current circuit for generating a control voltage that controls the reference current, the current control circuit including first and second transistors comprising N-channel MOS field effect transistors, said first and second transistors having different threshold voltages, and third and fourth transistors, said third and fourth transistors being P-channel MOS field effect transistors, said third and fourth transistors having different threshold voltages.
Claim 2
Dependent Claim
83 words
An integrated circuit, comprising: a) a constant-current circuit for creating a reference current; and b) a current control circuit connected to said constant-current circuit for generating a control voltage that controls the reference current, the current control circuit including first and second transistors comprising N-channel MOS field effect transistors, said first and second transistors having different threshold voltages, and third and fourth transistors, said third and fourth transistors being P-channel MOS field effect transistors, said third and fourth transistors having different threshold voltages.
Claim 3
Dependent Claim
71 words
An integrated circuit according to claim 1 wherein said constant current circuit includes an N-channel driver transistor and a P-channel driver transistor, said N-channel driver transistor having source-to-drain path connected to a first terminal of a voltage supply, said P-channel driver transistor having a source-to-drain path connected to a second terminal of said power supply, and said control circuit applying said control voltage to a gate of said N-channel driver transistor.
Claim 4
Dependent Claim
29 words
An integrated circuit according to claim 2 wherein said control circuit applying a second control voltage, that controls the reference current, to a gate of said P-channel driver transistor.
Claim 5
Dependent Claim
22 words
An integrated circuit according to claim 3 wherein said control circuit generates said second control voltage from said third and fourth transistors.
Claim 6
Dependent Claim
26 words
An integrated circuit according to claim 4 wherein said first and second transistors have polysilicon gates which are doped differently to produce said different threshold voltages.
Claim 7
Dependent Claim
26 words
An integrated circuit according to claim 4 wherein said third and fourth transistors have polysilicon gates which are doped differently to produce said different threshold voltages.
Claim 8
Dependent Claim
30 words
An integrated circuit according to claim 1 wherein said first and second transistors are field effect transistors having polysilicon gates which are doped differently to produce said different threshold voltages.
Claim 9
Dependent Claim
137 words
A constant current generator circuit, comprising: first and second output transistors, the first output transistor having a source-to-drain path connected in series between a terminal of a voltage supply of one polarity and a first output node, the second output transistor having a source-to-drain path connected in series between a terminal of a voltage supply of opposite polarity and a second output node, a control circuit for generating first and second control voltages for applying to gates of said first and second output transistors, respectively; said control circuit including first and second control transistors for generating said first control voltage, said first and second control transistors having different threshold voltages, and said control circuit also including third and fourth control transistors for generating said second control voltage, said third and fourth control transistors having different threshold voltages.
Claim 10
Dependent Claim
137 words
A constant current generator circuit, comprising: first and second output transistors, the first output transistor having a source-to-drain path connected in series between a terminal of a voltage supply of one polarity and a first output node, the second output transistor having a source-to-drain path connected in series between a terminal of a voltage supply of opposite polarity and a second output node, a control circuit for generating first and second control voltages for applying to gates of said first and second output transistors, respectively; said control circuit including first and second control transistors for generating said first control voltage, said first and second control transistors having different threshold voltages, and said control circuit also including third and fourth control transistors for generating said second control voltage, said third and fourth control transistors having different threshold voltages.
Claim 11
Dependent Claim
39 words
A constant current generator circuit according to claim 8, wherein said first and second control transistors have source-to-drain paths connected in parallel between said terminal of a voltage supply of one polarity and first and second central nodes, respectively.
Claim 12
Dependent Claim
40 words
A constant current generator circuit according to claim 9, wherein said third and fourth control transistors have source-to-drain paths connected in parallel between said terminal of a voltage supply of opposite polarity and said first and second central nodes, respectively.
Claim 13
Dependent Claim
46 words
A constant current generator circuit according to claim 10, wherein said first output transistor and said first and second control transistors are N-channel MOS field effect transistors, and wherein said second output transistor and said third and fourth control transistors are P-channel MOS field effect transistors.
Claim 14
Dependent Claim
32 words
A constant current generator circuit according to claim 11, wherein all of said transistors have polysilicon gates, and selected ones of said gates are doped differently to produce said different threshold voltages.
Claim 15
Dependent Claim
40 words
A constant current generator circuit according to claim 11, wherein said first output transistor and said first control transistor have the same threshold voltage, and wherein said second output transistor and said third control transistor have the same threshold voltage.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2000-06-02 | 2000-12-02 | 2001-06-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-06-02 | 2004-12-02 | 2005-06-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-06-02 | 2008-12-02 | 2009-06-03 | $7700.00 | Window Closed / Lapsed |