Fabrication method for a thin film semiconductor device, the thin film semiconductor device itself, liquid crystal display, and electronic device

Claim 2

A fabrication process for fabricating a thin film semiconductor device using a low pressure chemical vapor deposition reactor, comprising: forming an underlevel protection layer comprising an insulating material formed on at least a portion of a substrate; and forming a silicon-containing semiconductor film on said underlevel protection layer, the silicon-containing semiconductor film being an active layer of a transistor, wherein the silicon-containing semiconductor film is formed with a low pressure chemical vapor deposition method using a higher silane as a source gas, the higher silane being Si n H 2n+2 , where n is an integer greater than or equal to 2, wherein the higher silane has a flow rate per unit area R, with R≧1.13×10 -3 sccm/cm 2 when R=Q/A, wherein A (cm 2 ): a total surface area inside the low pressure chemical vapor deposition reactor which can be covered with the silicon-containing semiconductor film, and Q (sccm): flow rate of the higher silane.

Claim 3

A fabrication process as described in claim 1, wherein the silicon-containing semiconductor film is formed with R≧2.27×10 -3 sccm/cm 2 .

Claim 4

A fabrication process for fabricating a thin film semiconductor device having a semiconductor film formed on a surface of a glass substrate, said semiconductor film being an active layer of a transistor, the process comprising: placing a plurality of substrate pairs in a hot wall, vertical low pressure chemical vapor deposition reactor, the substrate pairs being glass substrates and each one of the substrate pairs having a front side and a back side, a first one of the substrate pairs having a strain point higher than a strain point of a second one of the substrate pairs, the substrate pairs being placed in the vertical low pressure chemical vapor deposition reactor having the back sides of the first and second ones of the substrate pairs against each other, the first one of the substrate pairs being below the second one of the substrate pairs, and the first and second ones of the substrates pairs being approximately parallel to each other; and forming the semiconductor film on the front sides of the first and second ones of the substrate pairs.

Claim 5

A fabrication process for fabricating a thin film semiconductor device having a semiconductor film formed on a surface of a glass substrate, said semiconductor film being an active layer of a transistor, the process comprising: placing a plurality of substrate pairs in a hot wall, vertical low pressure chemical vapor deposition reactor, the substrate pairs being glass substrates and each one of the substrate pairs having a front side and a back side, a first one of the substrate pairs having a strain point higher than a strain point of a second one of the substrate pairs, the substrate pairs being placed in the vertical low pressure chemical vapor deposition reactor having the back sides of the first and second ones of the substrate pairs against each other, the first one of the substrate pairs being below the second one of the substrate pairs, and the first and second ones of the substrates pairs being approximately parallel to each other; and forming the semiconductor film on the front sides of the first and second ones of the substrate pairs.

Claim 6

A fabrication process for fabricating a thin film semiconductor device having an underlevel protection layer formed on a portion of a substrate and a semiconductor film formed on said underlevel protection layer using a plasma enhanced chemical vapor deposition reactor, the underlevel protection layer comprising an insulating material and the semiconductor film being an active layer of a transistor, the process comprising: exposing the underlevel protection layer to an oxygen plasma; and then forming the semiconductor film on top of said underlevel protection layer without breaking a vacuum of the plasma enhanced chemical vapor deposition reactor.

Claim 7

A fabrication process for fabricating a thin film semiconductor device having an underlevel protection layer formed on a portion of a substrate and a semiconductor film formed on said underlevel protection layer using a plasma enhanced chemical vapor deposition reactor, the underlevel protection layer comprising an insulating material and the semiconductor film being an active layer of a transistor, the process comprising: exposing the underlevel protection layer to an oxygen plasma; and then forming the semiconductor film on top of said underlevel protection layer without breaking a vacuum of the plasma enhanced chemical vapor deposition reactor.

Claim 8

A fabrication process as described in claim 4, wherein the vacuum is engaged in the plasma enhanced chemical vapor deposition reactor between the exposing step and the forming step.

Claim 9

A fabrication process for fabricating a thin film semiconductor device having an underlevel protection layer formed on at least a portion of a substrate and a semiconductor film formed on said underlevel protection layer using a plasma enhanced chemical vapor deposition reactor, the underlevel protection layer comprising an insulating material and the semiconductor film being an active layer of a transistor, the process comprising: exposing the underlevel protection layer to a hydrogen plasma; and then forming the semiconductor film on top of said underlevel protection layer without breaking a vacuum of the plasma enhanced chemical vapor deposition reactor.

Claim 10

A fabrication process for fabricating a thin film semiconductor device having an underlevel protection layer formed on at least a portion of a substrate and a semiconductor film formed on said underlevel protection layer using a plasma enhanced chemical vapor deposition reactor, the underlevel protection layer comprising an insulating material and the semiconductor film being an active layer of a transistor, the process comprising: exposing the underlevel protection layer to a hydrogen plasma; and then forming the semiconductor film on top of said underlevel protection layer without breaking a vacuum of the plasma enhanced chemical vapor deposition reactor.

Claim 11

A fabrication process for fabricating a thin film semiconductor device having an underlevel protection layer formed on at least a portion of a substrate and a semiconductor film formed on said underlevel protection layer using a plasma enhanced chemical vapor deposition reactor, the underlevel protection layer comprising an insulating material and the semiconductor film being an active layer of a transistor, the process comprising: exposing the underlevel protection layer to an oxygen plasma; then exposing the underlevel protection layer to a hydrogen plasma without breaking a vacuum of the plasma enhanced chemical vapor deposition reactor; and then forming the semiconductor film on top of said underlevel protection layer.

Claim 12

A fabrication process for fabricating a thin film semiconductor device having an underlevel protection layer formed on at least a portion of a substrate and a semiconductor film formed on said underlevel protection layer using a plasma enhanced chemical vapor deposition reactor, the underlevel protection layer comprising an insulating material and the semiconductor film being an active layer of a transistor, the process comprising: exposing the underlevel protection layer to an oxygen plasma; then exposing the underlevel protection layer to a hydrogen plasma without breaking a vacuum of the plasma enhanced chemical vapor deposition reactor; and then forming the semiconductor film on top of said underlevel protection layer.

Claim 13

A fabrication process as described in claim 7, wherein the vacuum is engaged in the plasma enhanced chemical vapor deposition reactor between the exposing the underlevel protection layer to the oxygen plasma step and the exposing the underlevel protection layer to the hydrogen plasma step.

Claim 14

A fabrication process for fabricating a thin film semiconductor device having an underlevel protection layer formed on at least a portion of a substrate and a semiconductor film formed on said underlevel protection layer using a plasma enhanced chemical vapor deposition reactor, the underlevel protection layer comprising an insulating material and the semiconductor film being an active layer of a transistor, the process comprising: depositing the semiconductor film with a deposition rate of approximately 0.1 nm/s or more to form a mixed crystallinity semiconductor film; and then melt crystallizing said semiconductor film.

Claim 15

A fabrication process for fabricating a thin film semiconductor device having an underlevel protection layer formed on at least a portion of a substrate and a semiconductor film formed on said underlevel protection layer using a plasma enhanced chemical vapor deposition reactor, the underlevel protection layer comprising an insulating material and the semiconductor film being an active layer of a transistor, the process comprising: depositing the semiconductor film with a deposition rate of approximately 0.1 nm/s or more to form a mixed crystallinity semiconductor film; and then melt crystallizing said semiconductor film.

Claim 16

A fabrication process as described in claim 9, wherein the deposition rate is approximately 3.7 nm/s or more to form the mixed-crystallinity semiconductor film.

Claim 17

A fabrication process for fabricating a thin film semiconductor device having an underlevel protection layer formed on at least a portion of a substrate and a semiconductor film formed on said underlevel protection layer using a plasma enhanced chemical vapor deposition reactor, the underlevel protection layer comprising an insulating material and the semiconductor film being an active layer of a transistor, the process comprising: forming a mixed-crystallinity semiconductor film, wherein chemical species containing constitutive elements of said semiconductor film and inert gases are used as source gases with a ratio of a flow rate of a gas containing the constitutive elements of the semiconductor film to a flow rate of the inert gases being less than about 1/33; and melt crystallizing said mixed-crystallinity semiconductor film.

Claim 18

A fabrication process for fabricating a thin film semiconductor device having an underlevel protection layer formed on at least a portion of a substrate and a semiconductor film formed on said underlevel protection layer using a plasma enhanced chemical vapor deposition reactor, the underlevel protection layer comprising an insulating material and the semiconductor film being an active layer of a transistor, the process comprising: forming a mixed-crystallinity semiconductor film, wherein chemical species containing constitutive elements of said semiconductor film and inert gases are used as source gases with a ratio of a flow rate of a gas containing the constitutive elements of the semiconductor film to a flow rate of the inert gases being less than about 1/33; and melt crystallizing said mixed-crystallinity semiconductor film.

Claim 19

A fabrication process as described in claim 11, wherein the flow ratio is between about 1/124 and 1/40.67.