US6137707A
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US
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Method and apparatus for simultaneously performing a plurality of compare operations in content addressable memory device
Assignee: Avago Technologies International Sales Pte Ltd
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Filing: 1999-03-26
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Granted: 2000-10-24
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Expires: 2019-03-26
Abstract
Abstract A method and apparatus for simultaneously performing a plurality compare operations in a content addressable memory (CAM) device. For one embodiment, the CAM device includes a CAM array having a plurality of CAM cells, a first comparand register for storing first comparand data, and a second comparand register for storing second comparand data. Each CAM cell receives the first comparand data over a first set of compare lines, and receives the second comparand data over a second set of compare lines. Each CAM cell has a memory cell and multiple compare circuits that can individually and simultaneously compare the first and second comparand data with data stored in the memory cell. The result of each comparison is reflected on a corresponding match line. The match lines are then selectively coupled to a priority encoder to determine a match address corresponding to each compare operation. For one embodiment, the CAM cells may be ternary CAM cells each having a mask cell.
Inventors
- 👤 Varadarajan Srinivasan
- 👤 Sandeep Khanna
- 👤 Bindiganavale S. Nataraj
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 21:32
CPC Classifications
G; G11; G11C; G11C15/00; G11C15/04
Claims Analysis
Total Claims: 52
Claim 1
Independent Claim
76 words
A content addressable memory (CAM) cell comprising: a memory cell to store data; a first compare circuit coupled to a first match line and having a first input coupled to the memory cell and a plurality of second inputs for receiving first comparand data; and a second compare circuit coupled to a second match line and having a first input coupled to the memory cell and a plurality of second inputs for receiving second comparand data.
Claim 2
Dependent Claim
76 words
A content addressable memory (CAM) cell comprising: a memory cell to store data; a first compare circuit coupled to a first match line and having a first input coupled to the memory cell and a plurality of second inputs for receiving first comparand data; and a second compare circuit coupled to a second match line and having a first input coupled to the memory cell and a plurality of second inputs for receiving second comparand data.
Claim 3
Dependent Claim
49 words
The CAM cell of claim 1, further comprising a mask cell coupled between the first compare circuit and the first match line, the mask circuit configured to mask a first comparison by the first compare circuit of the data stored in the memory cell and the first comparand data.
Claim 4
Dependent Claim
50 words
The CAM cell of claim 2, wherein the mask cell is further coupled between the second compare circuit and the second match line, the mask circuit configured to mask a second comparison by the second compare circuit of the data stored in the memory cell and the second comparand data.
Claim 5
Dependent Claim
48 words
The CAM cell of claim 1, further comprising a mask circuit coupled between the memory cell and the first compare circuit, the mask circuit configured to provide masked data or the data in the memory cell to the first compare circuit for comparison with the first comparand data.
Claim 6
Dependent Claim
50 words
The CAM cell of claim 4, wherein the mask circuit is further coupled between the memory cell and the second compare circuit, the mask circuit configured to provide the masked data or the data in the memory cell to the second compare circuit for comparison with the second comparand data.
Claim 7
Dependent Claim
53 words
The CAM cell of claim 1, further comprising a first mask circuit coupled between a first compare data line and the first compare circuit, the mask circuit configured to provide first masked data or the first comparand data to the first compare circuit for comparison with the data stored in the memory cell.
Claim 8
Dependent Claim
54 words
The CAM cell of claim 6, further comprising a second mask circuit coupled between a second compare data line and the second compare circuit, the second mask circuit configured to provide second masked data or the second comparand data to the second compare circuit for comparison with the data stored in the memory cell.
Claim 9
Dependent Claim
57 words
The CAM cell of claim 6, where in the first mask circuit is further coupled between a second compare data line and the second compare circuit, the first mask circuit configured to provide the first masked data or the second comparand data to the second compare circuit for comparison with the data stored in the memory cell.
Claim 10
Dependent Claim
32 words
The CAM cell of claim 1, wherein the first and second compare circuits are configured to simultaneously compare the first and second comparand data with the data stored in the memory cell.
Claim 11
Dependent Claim
28 words
The CAM cell of claim 1, wherein the first and second compare circuits receive the first and second comparand data from first and second compare data lines, respectively.
Claim 12
Dependent Claim
56 words
A content addressable memory (CAM) cell comprising: a memory cell for storing data; and means for simultaneously comparing first and second comparand data with the data stored in the memory cell and for determining the respective logic states of first and second match lines, wherein the first and second comparand data are independent of each other.
Claim 13
Dependent Claim
56 words
A content addressable memory (CAM) cell comprising: a memory cell for storing data; and means for simultaneously comparing first and second comparand data with the data stored in the memory cell and for determining the respective logic states of first and second match lines, wherein the first and second comparand data are independent of each other.
Claim 14
Dependent Claim
28 words
The CAM cell of claim 11, further comprising means for masking the comparison of the first and second comparand data with the data stored in the memory cell.
Claim 15
Dependent Claim
63 words
A content addressable memory (CAM) device comprising: a CAM array having a plurality of CAM cells each coupled to a plurality of match lines; a first comparand register for storing first comparand data to be compared with data stored in the CAM array; a second comparand register for storing second comparand data to be compared with the data stored in the CAM array.
Claim 16
Dependent Claim
63 words
A content addressable memory (CAM) device comprising: a CAM array having a plurality of CAM cells each coupled to a plurality of match lines; a first comparand register for storing first comparand data to be compared with data stored in the CAM array; a second comparand register for storing second comparand data to be compared with the data stored in the CAM array.
Claim 17
Dependent Claim
43 words
The CAM device of claim 13, further comprising: a priority encoder; and a multiplexer coupled to the first and second match line of each CAM cell, the multiplexer configured to selectively couple either the first or second match line to the priority encoder.
Claim 18
Dependent Claim
37 words
The CAM device of claim 13, further comprising: a first priority encoder coupled to the first match line of each CAM cell; and a second priority encoder coupled to the second match line of each CAM cell.
Claim 19
Dependent Claim
28 words
The CAM device of claim 13, wherein the CAM array is configured to simultaneously compare the first and second comparand data with data stored in the CAM array.
Claim 20
Dependent Claim
80 words
The CAM device of claim 13, wherein each CAM cell comprises: a memory cell to store the data for the CAM cell; a first compare circuit having a first input coupled to the memory cell and a second input coupled to the first comparand register for receiving the first comparand data; a second compare circuit having a first input coupled to the memory cell and a second input coupled to the second comparand register for receiving the second comparand data.
Claim 21
Dependent Claim
32 words
The CAM device of claim 17, wherein the first and second compare circuits are configured to simultaneously compare the first and second comparand data with the data stored in the memory cell.
Claim 22
Dependent Claim
28 words
The CAM device of claim 17, wherein the first and second compare circuits receive the first and second comparand data from first and second compare data lines, respectively.
Claim 23
Dependent Claim
19 words
The CAM device of claim 13, wherein the CAM cells comprise ternary CAM cells each having a mask cell.
Claim 24
Dependent Claim
15 words
The CAM device of claim 14, further comprising an instruction decoder coupled to the multiplexer.
Claim 25
Dependent Claim
15 words
The method of claim 14, further comprising an address decoder coupled to the CAM array.
Claim 26
Dependent Claim
16 words
The method of claim 22, wherein the address decoder is further coupled to the priority encoder.
Claim 27
Independent Claim
67 words
A method of determining if first and second comparand data match data stored in a CAM array, comprising: simultaneously comparing the first and second comparand data with data stored in a CAM cell of a CAM array, wherein the first and second comparand data are independent of each other; and determining the respective logical states of first and second match lines in response to the comparing step.
Claim 28
Independent Claim
67 words
A method of determining if first and second comparand data match data stored in a CAM array, comprising: simultaneously comparing the first and second comparand data with data stored in a CAM cell of a CAM array, wherein the first and second comparand data are independent of each other; and determining the respective logical states of first and second match lines in response to the comparing step.
Claim 29
Dependent Claim
38 words
The method of claim 24, further comprising: coupling the first match line to a priority encoder for a first period of time; and coupling the second match line to the priority encoder for a second period of time.
Claim 30
Dependent Claim
28 words
The method of claim 24, further comprising: coupling the first match line to a first priority encoder; and coupling the second match line to a second priority encoder.
Claim 31
Dependent Claim
21 words
The method of claim 24, further comprising masking the comparison of the first and second comparand data with the CAM cell.
Claim 32
Dependent Claim
83 words
A content addressable memory (CAM) cell comprising: a memory cell to store data; a first compare circuit having a first input coupled to the memory cell and a second input for receiving first comparand data; a second compare circuit having a first input coupled to the memory cell and a second input for receiving second comparand data, wherein the first and second comparand data are independent of each other; and a mask circuit coupled between the memory cell and the first compare circuit.
Claim 33
Dependent Claim
83 words
A content addressable memory (CAM) cell comprising: a memory cell to store data; a first compare circuit having a first input coupled to the memory cell and a second input for receiving first comparand data; a second compare circuit having a first input coupled to the memory cell and a second input for receiving second comparand data, wherein the first and second comparand data are independent of each other; and a mask circuit coupled between the memory cell and the first compare circuit.
Claim 34
Dependent Claim
80 words
A content addressable memory (CAM) cell comprising: a memory cell to store data; a first compare circuit having a first input coupled to the memory cell and a second input for receiving first comparand data; a second compare circuit having a first input coupled to the memory cell and a second input for receiving second comparand data; and a first mask circuit coupled between a first compare data line for carrying the first comparand data and the first compare circuit.
Claim 35
Dependent Claim
80 words
A content addressable memory (CAM) cell comprising: a memory cell to store data; a first compare circuit having a first input coupled to the memory cell and a second input for receiving first comparand data; a second compare circuit having a first input coupled to the memory cell and a second input for receiving second comparand data; and a first mask circuit coupled between a first compare data line for carrying the first comparand data and the first compare circuit.
Claim 36
Dependent Claim
97 words
A content addressable memory (CAM) cell comprising: a memory cell to store data; a first compare circuit having a first input coupled to the memory cell and a second input for receiving first comparand data; and a second compare circuit having a first input coupled to the memory cell and a second input for receiving second comparand data, wherein the first and second compare circuits are configured to simultaneously compare the first and second comparand data with the data stored in the memory cell, and wherein the first and second comparand data are independent of each other.
Claim 37
Dependent Claim
97 words
A content addressable memory (CAM) cell comprising: a memory cell to store data; a first compare circuit having a first input coupled to the memory cell and a second input for receiving first comparand data; and a second compare circuit having a first input coupled to the memory cell and a second input for receiving second comparand data, wherein the first and second compare circuits are configured to simultaneously compare the first and second comparand data with the data stored in the memory cell, and wherein the first and second comparand data are independent of each other.
Claim 38
Dependent Claim
124 words
A content addressable memory (CAM) cell comprising: a memory cell to store data; a first compare circuit coupled to a first match line and having a first input coupled to the memory cell and a second input for receiving first comparand data to compare with the data of the memory cell; and a second compare circuit coupled to a second match line and having a first input coupled to the memory cell and a second input for receiving second comparand data to compare with the data of the memory cell, wherein the first match line and the second match line have different logic states when only one of the first comparand data or the second comparand data matches the data of the memory cell.
Claim 39
Dependent Claim
124 words
A content addressable memory (CAM) cell comprising: a memory cell to store data; a first compare circuit coupled to a first match line and having a first input coupled to the memory cell and a second input for receiving first comparand data to compare with the data of the memory cell; and a second compare circuit coupled to a second match line and having a first input coupled to the memory cell and a second input for receiving second comparand data to compare with the data of the memory cell, wherein the first match line and the second match line have different logic states when only one of the first comparand data or the second comparand data matches the data of the memory cell.
Claim 40
Dependent Claim
63 words
A content addressable memory (CAM) device comprising: a CAM array comprising a plurality of rows of CAM cells each coupled to a corresponding first match line and a second match; a first priority encoder coupled to the first match lines of the rows of CAM cells; and a second priority encoder coupled to the second match lines of the rows of CAM cells.
Claim 41
Dependent Claim
63 words
A content addressable memory (CAM) device comprising: a CAM array comprising a plurality of rows of CAM cells each coupled to a corresponding first match line and a second match; a first priority encoder coupled to the first match lines of the rows of CAM cells; and a second priority encoder coupled to the second match lines of the rows of CAM cells.
Claim 42
Dependent Claim
67 words
A content addressable memory (CAM) device comprising: a CAM array comprising a plurality of rows of CAM cells each coupled to a corresponding first match line and second match line; a priority encoder; and a multiplexer coupled to the first and second match lines of each row of CAM cells, the multiplexer configured to selectively couple either the first or second match lines to the priority encoder.
Claim 43
Dependent Claim
67 words
A content addressable memory (CAM) device comprising: a CAM array comprising a plurality of rows of CAM cells each coupled to a corresponding first match line and second match line; a priority encoder; and a multiplexer coupled to the first and second match lines of each row of CAM cells, the multiplexer configured to selectively couple either the first or second match lines to the priority encoder.
Claim 44
Dependent Claim
50 words
A content addressable memory (CAM) cell comprising: a memory cell to store data; a plurality of compare circuits each coupled to the memory cell; and a plurality of match lines each coupled to one of the plurality of compare circuits, wherein the match lines are not coupled to each other.
Claim 45
Dependent Claim
50 words
A content addressable memory (CAM) cell comprising: a memory cell to store data; a plurality of compare circuits each coupled to the memory cell; and a plurality of match lines each coupled to one of the plurality of compare circuits, wherein the match lines are not coupled to each other.
Claim 46
Dependent Claim
85 words
A content addressable memory (CAM) cell comprising: a memory cell to store a pair of complementary data bits; a first compare circuit having first inputs coupled to the memory cell to receive the pair of complementary data bits, and second inputs for receiving a first pair of complementary comparand data bits; and a second compare circuit having first inputs coupled to the memory cell to receive the pair of complementary data bits, and second inputs for receiving a second pair of complementary comparand data bits.
Claim 47
Dependent Claim
85 words
A content addressable memory (CAM) cell comprising: a memory cell to store a pair of complementary data bits; a first compare circuit having first inputs coupled to the memory cell to receive the pair of complementary data bits, and second inputs for receiving a first pair of complementary comparand data bits; and a second compare circuit having first inputs coupled to the memory cell to receive the pair of complementary data bits, and second inputs for receiving a second pair of complementary comparand data bits.
Claim 48
Dependent Claim
29 words
The CAM cell of claim 35, further comprising: a first match line coupled to the first compare circuit; and a second match line coupled to the second compare circuit.
Claim 49
Dependent Claim
52 words
The CAM cell of claim 35, further comprising a mask cell coupled to the first compare circuit, the mask circuit configured to mask a first comparison by the first compare circuit of the pair of complementary data bits stored in the memory cell and the first pair of complementary comparand data bits.
Claim 50
Dependent Claim
52 words
The CAM cell of claim 35, further comprising a mask cell coupled to the second compare circuit, the mask circuit configured to mask a first comparison by the first compare circuit of the pair of complementary data bits stored in the memory cell and the second pair of complementary comparand data bits.
Claim 51
Dependent Claim
40 words
The CAM cell of claim 35, wherein the first and second compare circuits are configured to simultaneously compare the first and second pair of complementary comparand data bits with the pair of complementary data bits stored in the memory cell.
Claim 52
Dependent Claim
57 words
The CAM cell of claim 35, further comprising: a first pair of compare data lines coupled to the first compare circuit and for carrying the first pair of complementary comparand data bits; and a second pair of compare data lines coupled to the second compare circuit and for carrying the second pair of complementary comparand data bits.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-10-24 | 2004-04-24 | 2004-10-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-10-24 | 2008-04-24 | 2008-10-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-10-24 | 2012-04-24 | 2012-10-24 | $7700.00 | Window Closed / Lapsed |