Patent US6525949B1 successfully refreshed from Google Patents.
US6525949B1
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US
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Charge pump circuit
Assignee: SanDisk Technologies LLC
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Filing: 2000-12-22
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Granted: 2003-02-25
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Expires: 2020-12-22
Abstract
Abstract A charge pump circuit includes, in a preferred embodiment, a plurality of serially-connected pump stages, each of which is driven by one or more associated clock signals for the stage. The amplitude of the clock signals associated with a respective one of the pump stages differ in amplitude from that of the clock signals associated with at least one other pump stage. As a result, the additional voltage achieved by each successive pump stage may be progressively larger for each successive pump stage. An exemplary charge pump circuit provides clock signals which increase in amplitude with each successive pump stage, and provides with each successive pump stage an output voltage having a magnitude that is a multiplicative factor of the magnitude of the input voltage for the stage. Consequently, the output voltage achieved by the exemplary charge pump circuit is an exponential function of the number of pump stages within the charge pump circuit.
Inventors
- 👤 Mark G. Johnson
- 👤 Joseph G. Nolan, III
- 👤 Matthew P. Crowley
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 11:11
CPC Classifications
H; H02; H02M; H02M3/00; H02M3/02; H02M3/04; H02M3/06; H02M3/07; H02M3/073
Claims Analysis
Total Claims: 38
Claim 1
Independent Claim
46 words
A charge pump circuit comprising: a plurality of serially-connected pump stages, each responsive to at least one associated clock signal; wherein an associated clock signal for one of the pump stages differs in amplitude from an associated clock signal for at least one other pump stage.
Claim 2
Dependent Claim
46 words
A charge pump circuit comprising: a plurality of serially-connected pump stages, each responsive to at least one associated clock signal; wherein an associated clock signal for one of the pump stages differs in amplitude from an associated clock signal for at least one other pump stage.
Claim 3
Dependent Claim
53 words
The circuit as recited in claim 1 wherein: each clock signal associated with a respective pump stage has a respective amplitude associated therewith; and the clock signal amplitude for a given pump stage is greater than or equal to the clock signal amplitude for a pump stage immediately preceding the given pump stage.
Claim 4
Dependent Claim
36 words
The circuit as recited in claim 1 wherein: each clock signal associated with a respective pump stage has a respective amplitude associated therewith; and the respective clock signal amplitude is different for each respective pump stage.
Claim 5
Dependent Claim
24 words
The circuit as recited in claim 3 wherein: the respective clock signal amplitude for each respective pump stage increases with each succeeding pump stage.
Claim 6
Dependent Claim
30 words
The circuit as recited in claim 4 wherein: the respective amplitude of clock signals associated with a respective pump stage increases by a multiplicative factor with each succeeding pump stage.
Claim 7
Dependent Claim
32 words
The circuit as recited in claim 4 wherein: the respective amplitude of clock signals associated with a respective pump stage increases by approximately a factor of two with each succeeding pump stage.
Claim 8
Dependent Claim
58 words
The circuit as recited in claim 1 wherein: each of the plurality of serially-connected pump stages is responsive to an associated complementary pair of clock signals; and the complementary clock signals associated with a respective one of the pump stages differ in amplitude from a complementary pair of clock signals associated with at least one other pump stage.
Claim 9
Dependent Claim
53 words
The circuit as recited in claim 7 wherein: each clock signal associated with a respective pump stage has a respective amplitude associated therewith; and the clock signal amplitude for a given pump stage is greater than or equal to the clock signal amplitude for a pump stage immediately preceding the given pump stage.
Claim 10
Dependent Claim
36 words
The circuit as recited in claim 7 wherein: each clock signal associated with a respective pump stage has a respective amplitude associated therewith; and the respective clock signal amplitude is different for each respective pump stage.
Claim 11
Dependent Claim
24 words
The circuit as recited in claim 9 wherein: the respective clock signal amplitude for each respective pump stage increases with each succeeding pump stage.
Claim 12
Dependent Claim
30 words
The circuit as recited in claim 10 wherein: the respective amplitude of clock signals associated with a respective pump stage increases by a multiplicative factor with each succeeding pump stage.
Claim 13
Dependent Claim
32 words
The circuit as recited in claim 10 wherein: the respective amplitude of clock signals associated with a respective pump stage increases by a substantially uniform multiplicative factor with each succeeding pump stage.
Claim 14
Dependent Claim
32 words
The circuit as recited in claim 12 wherein: the respective amplitude of clock signals associated with a respective pump stage increases by approximately a factor of two with each succeeding pump stage.
Claim 15
Dependent Claim
179 words
The circuit as recited in claim 7 wherein at least one pump stage comprises: a first pair of cross-coupled transistors of a first polarity, each having a respective source terminal coupled to an input terminal of the pump stage, each having a respective drain terminal coupled to a respective one of a pair of internal cross-coupled nodes, and each having a respective gate terminal coupled to the respective drain terminal of the other transistor of the first pair; a second pair of cross-coupled transistors of a second polarity opposite the first polarity, each having a respective source terminal coupled to an output terminal of the pump stage, each having a respective drain terminal coupled to a respective one of the pair of internal cross-coupled nodes, and each having a respective gate terminal coupled to the respective drain terminal of the other transistor of the second pair; and a pair of capacitors, each coupling a respective one of the complementary pair of clock signals associated with the pump stage to a respective one of the pair of internal cross-coupled nodes.
Claim 16
Dependent Claim
122 words
The circuit as recited in claim 7 wherein at least one pump stage comprises: a first pair of diodes, each having a respective first terminal coupled to an input terminal of the pump stage, and each having a respective second terminal coupled to a respective one of a pair of internal nodes; a second pair of diodes, each having a respective first terminal coupled to an output terminal of the pump stage, and each having a respective second terminal coupled to a respective one of the pair of internal nodes; and a pair of capacitors, each coupling a respective one of the complementary pair of clock signals associated with the pump stage to a respective one of the pair of internal nodes.
Claim 17
Dependent Claim
177 words
The circuit as recited in claim 7 wherein each pump stage comprises: a first pair of cross-coupled transistors of a first polarity, each having a respective source terminal coupled to an input terminal of the pump stage, each having a respective drain terminal coupled to a respective one of a pair of internal cross-coupled nodes, and each having a respective gate terminal coupled to the respective drain terminal of the other transistor of the first pair; a second pair of cross-coupled transistors of a second polarity opposite the first polarity, each having a respective source terminal coupled to an output terminal of the pump stage, each having a respective drain terminal coupled to a respective one of the pair of internal cross-coupled nodes, and each having a respective gate terminal coupled to the respective drain terminal of the other transistor of the second pair; and a pair of capacitors, each coupling a respective one of the complementary pair of clock signals associated with the pump stage to a respective one of the pair of internal cross-coupled nodes.
Claim 18
Dependent Claim
53 words
The circuit as recited in claim 16 wherein: each clock signal associated with a respective pump stage has a respective amplitude associated therewith; and the clock signal amplitude for a given pump stage is greater than or equal to the clock signal amplitude for a pump stage immediately preceding the given pump stage.
Claim 19
Dependent Claim
36 words
The circuit as recited in claim 16 wherein: each clock signal associated with a respective pump stage has a respective amplitude associated therewith; and the respective clock signal amplitude is different for each respective pump stage.
Claim 20
Dependent Claim
24 words
The circuit as recited in claim 18 wherein: the respective clock signal amplitude for each respective pump stage increases with each succeeding pump stage.
Claim 21
Dependent Claim
30 words
The circuit as recited in claim 19 wherein: the respective amplitude of clock signals associated with a respective pump stage increases by a multiplicative factor with each succeeding pump stage.
Claim 22
Dependent Claim
32 words
The circuit as recited in claim 19 wherein: the respective amplitude of clock signals associated with a respective pump stage increases by a substantially uniform multiplicative factor with each succeeding pump stage.
Claim 23
Dependent Claim
32 words
The circuit as recited in claim 19 wherein: the respective amplitude of clock signals associated with a respective pump stage increases by approximately a factor of two with each succeeding pump stage.
Claim 24
Dependent Claim
89 words
A charge pump circuit comprising: a plurality of serially-connected pump stages, each having an input node and an output node, the input node of a first such serially-connected pump stage coupled to receive an input voltage for the charge pump circuit, each respective pump stage responsive to a respective complementary pair of clock signals having a respective amplitude, for generating a boosted output voltage on the output node of a last such serial-connected pump stage; wherein at least two of the complementary pairs of clock signals have different amplitudes.
Claim 25
Dependent Claim
89 words
A charge pump circuit comprising: a plurality of serially-connected pump stages, each having an input node and an output node, the input node of a first such serially-connected pump stage coupled to receive an input voltage for the charge pump circuit, each respective pump stage responsive to a respective complementary pair of clock signals having a respective amplitude, for generating a boosted output voltage on the output node of a last such serial-connected pump stage; wherein at least two of the complementary pairs of clock signals have different amplitudes.
Claim 26
Dependent Claim
37 words
The circuit as recited in claim 23 wherein: the complementary pair of clock signals for a given stage has an amplitude greater than that of the complementary pair of clock signals for an immediately preceding pump stage.
Claim 27
Dependent Claim
50 words
The circuit as recited in claim 24 wherein: the amplitude of the clock signals for a given pump stage is substantially equal to the magnitude, relative to a ground reference voltage, of a voltage nominally generated on the input of the given pump stage by an immediately preceding pump stage.
Claim 28
Dependent Claim
177 words
The circuit as recited in claim 25 wherein each pump stage comprises: a first pair of cross-coupled transistors of a first polarity, each having a respective source terminal coupled to the input terminal of the pump stage, each having a respective drain terminal coupled to a respective one of a pair of internal cross-coupled nodes, and each having a respective gate terminal coupled to the respective drain terminal of the other transistor of the first pair; a second pair of cross-coupled transistors of a second polarity opposite the first polarity, each having a respective source terminal coupled to the output terminal of the pump stage, each having a respective drain terminal coupled to a respective one of the pair of internal cross-coupled nodes, and each having a respective gate terminal coupled to the respective drain terminal of the other transistor of the second pair; and a pair of capacitors, each coupling a respective one of the complementary pair of clock signals associated with the pump stage to a respective one of the pair of internal cross-coupled nodes.
Claim 29
Dependent Claim
66 words
The circuit as recited in claim 25 further comprising: a plurality of clock circuits, each for respectively generating the respective complementary pair of clock signals for a respective pump stage having a respective amplitude which is substantially equal to the magnitude, relative to a ground reference voltage, of a voltage nominally generated on the input of the given pump stage by an immediately preceding pump stage.
Claim 30
Dependent Claim
45 words
The circuit as recited in claim 27 wherein: each of the first pair of transistors comprises an N-channel transistor; each of the second pair of transistors comprises a P-channel transistor; and the boosted output voltage is more positive than the charge pump circuit input voltage.
Claim 31
Dependent Claim
88 words
A charge pump circuit comprising: a plurality M of serially-connected pump stages, each having an input node and an output node, the input node of a first such serially-connected pump stage coupled to receive an input voltage for the charge pump circuit, each respective pump stage responsive to a respective one of a plurality M of complementary pairs of clock signals having a respective amplitude different for each respective pump stage, for generating a boosted output voltage on the output node of a last such serial-connected pump stage.
Claim 32
Dependent Claim
88 words
A charge pump circuit comprising: a plurality M of serially-connected pump stages, each having an input node and an output node, the input node of a first such serially-connected pump stage coupled to receive an input voltage for the charge pump circuit, each respective pump stage responsive to a respective one of a plurality M of complementary pairs of clock signals having a respective amplitude different for each respective pump stage, for generating a boosted output voltage on the output node of a last such serial-connected pump stage.
Claim 33
Dependent Claim
177 words
The circuit as recited in claim 29 wherein each pump stage comprises: a first pair of cross-coupled transistors of a first polarity, each having a respective source terminal coupled to the input terminal of the pump stage, each having a respective drain terminal coupled to a respective one of a pair of internal cross-coupled nodes, and each having a respective gate terminal coupled to the respective drain terminal of the other transistor of the first pair; a second pair of cross-coupled transistors of a second polarity opposite the first polarity, each having a respective source terminal coupled to the output terminal of the pump stage, each having a respective drain terminal coupled to a respective one of the pair of internal cross-coupled nodes, and each having a respective gate terminal coupled to the respective drain terminal of the other transistor of the second pair; and a pair of capacitors, each coupling a respective one of the complementary pair of clock signals associated with the pump stage to a respective one of the pair of internal cross-coupled nodes.
Claim 34
Dependent Claim
45 words
The circuit as recited in claim 30 wherein: each of the first pair of transistors comprises an N-channel transistor; each of the second pair of transistors comprises a P-channel transistor; and the boosted output voltage is more positive than the charge pump circuit input voltage.
Claim 35
Dependent Claim
66 words
The circuit as recited in claim 30 further comprising: a plurality of clock circuits, each for respectively generating the respective complementary pair of clock signals for a respective pump stage having a respective amplitude which is substantially equal to the magnitude, relative to a ground reference voltage, of a voltage nominally generated on the input of the given pump stage by an immediately preceding pump stage.
Claim 36
Dependent Claim
78 words
A charge pump circuit comprising: a plurality of serially-connected pump stages, each stage responsive to a respective complementary pair of clock signals; and a plurality of clock circuits, each respectively having a complementary pair of clock signal outputs coupled to a respective pump stage, each respectively configured to generate for the respective pump stage a respective pair of complementary clocking signals having an amplitude substantially equal to the magnitude of an input voltage coupled to the respective stage.
Claim 37
Dependent Claim
78 words
A charge pump circuit comprising: a plurality of serially-connected pump stages, each stage responsive to a respective complementary pair of clock signals; and a plurality of clock circuits, each respectively having a complementary pair of clock signal outputs coupled to a respective pump stage, each respectively configured to generate for the respective pump stage a respective pair of complementary clocking signals having an amplitude substantially equal to the magnitude of an input voltage coupled to the respective stage.
Claim 38
Dependent Claim
39 words
The circuit as recited in claim 33 : incorporated within an integrated circuit including a non-volatile memory array; wherein the output voltage of the charge pump circuit is used to generate a programming voltage for the non-volatile memory array.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2006-02-24 | 2006-08-26 | 2007-02-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2010-02-24 | 2010-08-26 | 2011-02-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2014-02-24 | 2014-08-26 | 2015-02-25 | $7700.00 | Window Closed / Lapsed |