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US6602805B2 Expired / Lapsed US ⏱️ 0.0 years remaining

Method for forming gate dielectric layer in NROM

Assignee: Macronix International Co Ltd
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Filing: 2000-12-14
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Granted: 2003-08-05
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Expires: 2020-12-14
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Abstract

Abstract In fabricating nitride read only memory, a zirconium oxide layer has high dielectric constant and a zirconium oxide layer is replaced conventional tunnel oxide layer. Zirconium oxide layer can increase coupling ratio of gate dielectric layer and reliability for nitride read only memory type flash memory is improved. This invention, a substrate is provided and a zirconium oxide layer is formed on substrate by reactive magnetron sputtering and a silicon nitride layer is sandwiched between a zirconium oxide layer and a silicon oxide layer. Then, an ONO layer (oxide-nitride-oxide layer) is formed. The method is using zirconium oxide as gate dielectric can reduce leakage current, increase drain current, improve subthreshold characteristics, and electron and hole mobilities.

Inventors

  • 👤 Kent Kuohua Chang

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 11:32
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01332; H10D64/01336; H10D64/0134; H10D64/031; H10D64/037; H10D64/60; H10D64/66; H10D64/68; H10D64/681; H10D64/685; H10D64/691; H10D64/693; H10D64/01342; H10D64/01344

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 129 words
A method for forming nitride read only memory, said a method comprising: providing a substrate; forming a zirconium oxide layer on said substrate by using sputtering method; performing annealing treatment to said zirconium oxide layer; forming a silicon nitride layer on said zirconium oxide layer; forming a silicon oxide layer on said silicon nitride layer; forming a polysilicon layer on said silicon oxide layer; forming a photoresist over said polysilicon layer and defining a gate pattern on said photoresist; etching said polysilicon layer, said silicon oxide layer, said silicon nitride layer, and said zirconium oxide layer to form gate electrode by using said photoresist as a mask; removing said photoresist; forming a spacer on sidewall of said gate electrode; and forming a source and a drain in said substrate.
Claim 2
Independent Claim 129 words
A method for forming nitride read only memory, said a method comprising: providing a substrate; forming a zirconium oxide layer on said substrate by using sputtering method; performing annealing treatment to said zirconium oxide layer; forming a silicon nitride layer on said zirconium oxide layer; forming a silicon oxide layer on said silicon nitride layer; forming a polysilicon layer on said silicon oxide layer; forming a photoresist over said polysilicon layer and defining a gate pattern on said photoresist; etching said polysilicon layer, said silicon oxide layer, said silicon nitride layer, and said zirconium oxide layer to form gate electrode by using said photoresist as a mask; removing said photoresist; forming a spacer on sidewall of said gate electrode; and forming a source and a drain in said substrate.
Claim 3
Dependent Claim 17 words
The method according to claim 1 , wherein said sputtering method comprises a reactive magnetron sputtering method.
Claim 4
Dependent Claim 23 words
The method according to claim 1 , wherein temperature for forming said zirconium oxide layer is between about 200 to 800 degree centigrade.
Claim 5
Dependent Claim 21 words
The method according to claim 1 , wherein thickness of said zirconium oxide layer is between about 20 to 70 angstrom.
Claim 6
Dependent Claim 28 words
The method according to claim 1 , wherein said annealing temperature is between about 650 to 1000 degree centigrade and duration is between about 20 to 50 seconds.
Claim 7
Dependent Claim 14 words
The method according to claim 1 , wherein said treatment environment is noble gas.
Claim 8
Dependent Claim 24 words
The method according to claim 1 , wherein a neutral treatment environment is selected from the group consisting of Ar, N 2 and NO.

References Cited (Backward Citations)

US5828080A Cited
US6020243A Cited
US6060755A Cited
US6407435B1 Cited
US6320784B1 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2006-08-04 2007-02-03 2007-08-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2010-08-04 2011-02-03 2011-08-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2014-08-04 2015-02-03 2015-08-05 $7700.00 Window Closed / Lapsed

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