US5793115A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Three dimensional processor using transferred thin film circuits
Assignee: Callahan Cellular LLC
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Filing: 1994-09-29
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Granted: 1998-08-11
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Expires: 2014-09-29
Abstract
Abstract A multi-layered structure is fabricated in which a microprocessor is configured in different layers and interconnected vertically through insulating layers which separate each circuit layer of the structure. Each circuit layer can be fabricated in a separate wafer or thin film material and then transferred onto the layered structure and interconnected.
Inventors
- 👤 Paul M. Zavracky
- 👤 Matthew Zavracky
- 👤 Duy-Phach Vu
- 👤 Brenda Dingle
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 15:56
CPC Classifications
H; H10; H10W; H10W90/00; H10W70/00; H10W70/099; H10W90/401; H10W72/00; H10W72/01; H10W90/20; H10W90/297; H10W90/701; H10W90/721; H10W90/722; Y; Y10; Y10S; Y10S148/00; Y10S148/164
Claims Analysis
Total Claims: 38
Claim 1
Independent Claim
108 words
A data processing device comprising; a first circuit layer formed in a semiconductor material and having a controller in the first circuit layer to control a data processing operation; a second circuit layer formed in a thin film silicon material of a silicon-on-insulator (SOI) structure and having a logic unit in the second circuit layer that is connected with and controlled by the controller; and an adhesive layer positioned between and securing the first circuit layer with the second circuit layer, the adhesive layer having interconnects extending between the first circuit layer and the second circuit layer to conduct control signals between the controller and the logic unit.
Claim 2
Dependent Claim
108 words
A data processing device comprising; a first circuit layer formed in a semiconductor material and having a controller in the first circuit layer to control a data processing operation; a second circuit layer formed in a thin film silicon material of a silicon-on-insulator (SOI) structure and having a logic unit in the second circuit layer that is connected with and controlled by the controller; and an adhesive layer positioned between and securing the first circuit layer with the second circuit layer, the adhesive layer having interconnects extending between the first circuit layer and the second circuit layer to conduct control signals between the controller and the logic unit.
Claim 3
Dependent Claim
16 words
The data processing device of claim 1 wherein the first circuit layer further comprises a memory.
Claim 4
Dependent Claim
16 words
The data processing device of claim 1 wherein the second circuit layer further comprises a memory.
Claim 5
Dependent Claim
40 words
The data processing device of claim 1 further comprising a third circuit layer connected by interconnects with the second circuit layer, the interconnects extending through a second adhesive layer that secures the third circuit layer to the second circuit layer.
Claim 6
Dependent Claim
15 words
The data processing device of claim 1 wherein the adhesive layer comprises a polymeric material.
Claim 7
Dependent Claim
16 words
The data processing device of claim 1 wherein the adhesive layer comprises a thermally conductive epoxy.
Claim 8
Dependent Claim
16 words
The data processing device of claim 1 wherein the adhesive layer further comprises a particulate filler.
Claim 9
Dependent Claim
14 words
The data processing device of claim 7 wherein the particulate filler comprises metallic particles.
Claim 10
Dependent Claim
17 words
The data processing device of claim 1 wherein the logic unit circuit comprises an arithmetic logic unit.
Claim 11
Dependent Claim
111 words
An optoelectronic data processing device comprising; a first circuit layer formed in a semiconductor material and having a controller in the first circuit layer to control a data processing operation; a second circuit layer formed in a thin film silicon material of a silicon-on-insulator structure and having a light emitting device in the second circuit layer that is connected with and controlled by the controller; and an adhesive layer positioned between and securing the first circuit layer with the second circuit layer, the adhesive layer having interconnects extending between the first circuit layer and the second circuit layer to conduct control signals between the controller and the logic light emitting device.
Claim 12
Dependent Claim
111 words
An optoelectronic data processing device comprising; a first circuit layer formed in a semiconductor material and having a controller in the first circuit layer to control a data processing operation; a second circuit layer formed in a thin film silicon material of a silicon-on-insulator structure and having a light emitting device in the second circuit layer that is connected with and controlled by the controller; and an adhesive layer positioned between and securing the first circuit layer with the second circuit layer, the adhesive layer having interconnects extending between the first circuit layer and the second circuit layer to conduct control signals between the controller and the logic light emitting device.
Claim 13
Dependent Claim
16 words
The data processing device of claim 10 wherein the first circuit layer further comprises a memory.
Claim 14
Dependent Claim
16 words
The data processing device of claim 10 wherein the second circuit layer further comprises a memory.
Claim 15
Dependent Claim
39 words
The data processing device of claim 10 further comprising a third circuit layer connected by interconnects with the first circuit layer, the interconnects extending through an adhesive layer that secures the third circuit layer to the first circuit layer.
Claim 16
Dependent Claim
15 words
The data processing device of claim 10 wherein the adhesive layer comprises a polymeric material.
Claim 17
Dependent Claim
16 words
The data processing device of claim 10 wherein the adhesive layer comprises a thermally conductive epoxy.
Claim 18
Dependent Claim
16 words
The data processing device of claim 10 wherein the adhesive layer further comprises a particulate filler.
Claim 19
Dependent Claim
14 words
The data processing device of claim 16 wherein the particulate filler comprises metallic particles.
Claim 20
Dependent Claim
17 words
The data processing device of claim 10 wherein the first circuit layer comprises an arithmetic logic unit.
Claim 21
Dependent Claim
120 words
A parallel processing device comprising; a first circuit layer formed in a semiconductor material and having a controller and logic unit in the first circuit layer to control and perform a data processing operation; a second circuit layer formed in a thin film silicon material of a silicon-on-insulator (SOI) structure and having a second controller and a second logic unit in the second circuit to control and perform a second data processing operation; and an adhesive layer positioned between and securing the first circuit layer with the second circuit layer, the adhesive layer having interconnects extending between the first circuit layer and the second circuit layer to conduct control signals between the first circuit layer and the second circuit layer.
Claim 22
Dependent Claim
120 words
A parallel processing device comprising; a first circuit layer formed in a semiconductor material and having a controller and logic unit in the first circuit layer to control and perform a data processing operation; a second circuit layer formed in a thin film silicon material of a silicon-on-insulator (SOI) structure and having a second controller and a second logic unit in the second circuit to control and perform a second data processing operation; and an adhesive layer positioned between and securing the first circuit layer with the second circuit layer, the adhesive layer having interconnects extending between the first circuit layer and the second circuit layer to conduct control signals between the first circuit layer and the second circuit layer.
Claim 23
Dependent Claim
15 words
The processing device of claim 19 wherein the first circuit layer further comprises a memory.
Claim 24
Dependent Claim
16 words
The data processing device of claim 19 wherein the second circuit layer further comprises a memory.
Claim 25
Dependent Claim
40 words
The data processing device of claim 19 further comprising a third circuit layer connected by interconnects with the second circuit layer, the interconnects extending through a second adhesive layer that secures the third circuit layer to the second circuit layer.
Claim 26
Dependent Claim
14 words
The processing device of claim 19 wherein the adhesive layer comprises a polymeric material.
Claim 27
Dependent Claim
15 words
The processing device of claim 19 wherein the adhesive layer comprises a thermally conductive epoxy.
Claim 28
Dependent Claim
15 words
The processing device of claim 19 wherein the adhesive layer further comprises a particulate filler.
Claim 29
Dependent Claim
13 words
The processing device of claim 25 wherein the particulate filler comprises metallic particles.
Claim 30
Dependent Claim
16 words
The processing device of claim 19 wherein each logic unit circuit comprises an arithmetic logic unit.
Claim 31
Dependent Claim
156 words
A multi-layered data processing device comprising; a first circuit layer formed in a semiconductor material and having a controller in the first circuit layer to control a data processing operation; a second circuit layer formed in a thin film silicon material of a silicon-on-insulator structure and having a logic unit in the second circuit layer that is connected with and controlled by the controller; a circuit routing layer positioned between the first circuit layer and the second circuit layer, the circuit routing layer having interconnects extending in a plane parallel to the first circuit layer which conduct signals between the first circuit layer and the second circuit; and an adhesive layer positioned between and securing the first circuit layer with the second circuit layer, the adhesive layer having interconnects extending between the first circuit layer, the routing layer and the second circuit layer to conduct signals between the first circuit layer and the second circuit layer.
Claim 32
Dependent Claim
156 words
A multi-layered data processing device comprising; a first circuit layer formed in a semiconductor material and having a controller in the first circuit layer to control a data processing operation; a second circuit layer formed in a thin film silicon material of a silicon-on-insulator structure and having a logic unit in the second circuit layer that is connected with and controlled by the controller; a circuit routing layer positioned between the first circuit layer and the second circuit layer, the circuit routing layer having interconnects extending in a plane parallel to the first circuit layer which conduct signals between the first circuit layer and the second circuit; and an adhesive layer positioned between and securing the first circuit layer with the second circuit layer, the adhesive layer having interconnects extending between the first circuit layer, the routing layer and the second circuit layer to conduct signals between the first circuit layer and the second circuit layer.
Claim 33
Dependent Claim
16 words
The data processing device of claim 28 wherein the first circuit layer further comprises a memory.
Claim 34
Dependent Claim
16 words
The data processing device of claim 28 wherein the second circuit layer further comprises a memory.
Claim 35
Dependent Claim
40 words
The data processing device of claim 28 further comprising a third circuit layer connected by interconnects with the second circuit layer, the interconnects extending through a second adhesive layer that secures the third circuit layer to the second circuit layer.
Claim 36
Dependent Claim
15 words
The data processing device of claim 28 wherein the adhesive layer comprises a polymeric material.
Claim 37
Dependent Claim
16 words
The data processing device of claim 28 wherein the adhesive layer comprises a thermally conductive epoxy.
Claim 38
Dependent Claim
17 words
The data processing device of claim 28 wherein the logic unit circuit comprises an arithmetic logic unit.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-08-10 | 2002-02-09 | 2002-08-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-08-10 | 2006-02-09 | 2006-08-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-08-10 | 2010-02-09 | 2010-08-11 | $7700.00 | Window Closed / Lapsed |